20 ps time resolution with a fully-efficient monolithic silicon pixel detector without internal gain layer Article Swipe

PDF

Related Concepts

Materials science Layer (electronics) Detector Silicon Optoelectronics Resolution (logic) Pixel Optics Computer science Physics Nanotechnology Artificial intelligence

S. Zambito , Matteo Milanesio , T. Moretti , L. Paolozzi , Magdalena Münker , R. Cardella , T. Kugathasan , Fulvio Martinelli , A. Picardi , M. Elviretti , H. Rücker , A. Trusch , F. Cadoux , R. Cardarelli , S. Débieux , Y. Favre , Carlo Alberto Fenoglio , D. Ferrère , S. González-Sevilla , L. Iodice , R. Kotitsa , Chiara Magliocca , M. Nessi , A. Pizarro-Medina , J. Sabater Iglesias , J. Saidi , M. Vicente Barreto Pinto , G. Iacobucci ·

YOU? · · 2023 · Open Access · · DOI: https://doi.org/10.1088/1748-0221/18/03/p03047 · OA: W4361222735

A second monolithic silicon pixel prototype was produced for the MONOLITH project. The ASIC contains a matrix of hexagonal pixels with 100 μm pitch, readout by a low-noise and very fast SiGe HBT frontend electronics. Wafers with 50 μm thick epilayer of 350 Ωcm resistivity were used to produce a fully depleted sensor. Laboratory and testbeam measurements of the analog channels present in the pixel matrix show that the sensor has a 130 V wide bias-voltage operation plateau at which the efficiency is 99.8%. Although this prototype does not include an internal gain layer, the design optimised for timing of the sensor and the front-end electronics provides a time resolutions of 20 ps.