A balanced computational approach for multilevel VLSI circuit partitioning strategy with bat algorithm Article Swipe
V. Kumar
,
Aravindhan Alagarsamy
·
YOU?
·
· 2025
· Open Access
·
· DOI: https://doi.org/10.3934/electreng.2025018
YOU?
·
· 2025
· Open Access
·
· DOI: https://doi.org/10.3934/electreng.2025018
The selection of an appropriate partitioning approach significantly impacts integrated circuit (IC) size and performance. Inaccurate initial partitioning may lead to cascading issues throughout the physical design flow, affecting the performance of subsequent stages in the physical design process. Clustering the chip design into functional units and placing heavily communicating units in proximity can optimize wiring efficiency and improve overall chip performance. In this paper, we introduce a unique application of the bat algorithm (BA) to address the minimum cut cost in partitioning problems. Further, the BA is a nature-inspired metaheuristic algorithm capable of handling intricate and restricted optimization scenarios. The performance of the proposed partitioning with the BA was verified with several experiments on the MCNC and ISPD-98 benchmark datasets.
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Metadata
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All OpenAlex metadata
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https://doi.org/10.3934/electreng.2025018Digital Object Identifier
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A balanced computational approach for multilevel VLSI circuit partitioning strategy with bat algorithmWork title
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articleOpenAlex work type
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enPrimary language
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2025Year of publication
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2025-01-01Full publication date if available
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V. Kumar, Aravindhan AlagarsamyList of authors in order
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https://doi.org/10.3934/electreng.2025018Publisher landing page
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YesWhether a free full text is available
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diamondOpen access status per OpenAlex
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https://doi.org/10.3934/electreng.2025018Direct OA link when available
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