An All-Standard-Cell-Based Synthesizable SAR ADC with Inverter-Cell-Based Capacitive DAC Article Swipe
Shuowei Li
,
Zunsong Yang
,
Tetsuya Iizuka
·
YOU?
·
· 2024
· Open Access
·
· DOI: https://doi.org/10.1007/s00034-024-02963-0
YOU?
·
· 2024
· Open Access
·
· DOI: https://doi.org/10.1007/s00034-024-02963-0
This paper proposes an 8-bit synthesizable SAR ADC with inverter-cell-based capacitive digital-to-analog converters (CDACs). An inverter-cell-based capacitor is proposed by connecting the supply and ground ports of the inverter cells together but leaving them floated to suppress the voltage dependence to be suitable for employment in an ADC with moderate resolution. Furthermore, an inverter-cell-based analog switch is proposed to be employed in S/H and CDAC to achieve a fully standard-cell-based design without any custom-designed cells. The prototype is fabricated in a 65 nm standard CMOS process occupying 0.19 mm 2 . With a Nyquist input, the SFDR and SNDR reach 53.6 dB and 46.2 dB at 2.92 MS/s respectively without calibration. The power consumption is 425 $${\mu }$$ W from a 1.2 V supply, which leads to the Walden FoM of 0.86 pJ/conv.-step.
Related Topics
Concepts
Inverter
Capacitive sensing
Successive approximation ADC
Electronic engineering
Computer science
Electrical engineering
Engineering
Voltage
Capacitor
Metadata
- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.1007/s00034-024-02963-0
- https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdf
- OA Status
- hybrid
- Cited By
- 2
- References
- 23
- Related Works
- 10
- OpenAlex ID
- https://openalex.org/W4405706694
All OpenAlex metadata
Raw OpenAlex JSON
- OpenAlex ID
-
https://openalex.org/W4405706694Canonical identifier for this work in OpenAlex
- DOI
-
https://doi.org/10.1007/s00034-024-02963-0Digital Object Identifier
- Title
-
An All-Standard-Cell-Based Synthesizable SAR ADC with Inverter-Cell-Based Capacitive DACWork title
- Type
-
articleOpenAlex work type
- Language
-
enPrimary language
- Publication year
-
2024Year of publication
- Publication date
-
2024-12-23Full publication date if available
- Authors
-
Shuowei Li, Zunsong Yang, Tetsuya IizukaList of authors in order
- Landing page
-
https://doi.org/10.1007/s00034-024-02963-0Publisher landing page
- PDF URL
-
https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdfDirect link to full text PDF
- Open access
-
YesWhether a free full text is available
- OA status
-
hybridOpen access status per OpenAlex
- OA URL
-
https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdfDirect OA link when available
- Concepts
-
Inverter, Capacitive sensing, Successive approximation ADC, Electronic engineering, Computer science, Electrical engineering, Engineering, Voltage, CapacitorTop concepts (fields/topics) attached by OpenAlex
- Cited by
-
2Total citation count in OpenAlex
- Citations by year (recent)
-
2025: 2Per-year citation counts (last 5 years)
- References (count)
-
23Number of works referenced by this work
- Related works (count)
-
10Other works algorithmically related by OpenAlex
Full payload
| id | https://openalex.org/W4405706694 |
|---|---|
| doi | https://doi.org/10.1007/s00034-024-02963-0 |
| ids.doi | https://doi.org/10.1007/s00034-024-02963-0 |
| ids.openalex | https://openalex.org/W4405706694 |
| fwci | 0.73505193 |
| type | article |
| title | An All-Standard-Cell-Based Synthesizable SAR ADC with Inverter-Cell-Based Capacitive DAC |
| awards[0].id | https://openalex.org/G2723994578 |
| awards[0].funder_id | https://openalex.org/F4320334764 |
| awards[0].display_name | |
| awards[0].funder_award_id | JP21H03406 |
| awards[0].funder_display_name | Japan Society for the Promotion of Science |
| awards[1].id | https://openalex.org/G335507868 |
| awards[1].funder_id | https://openalex.org/F4320338117 |
| awards[1].display_name | |
| awards[1].funder_award_id | JPMJTR201C |
| awards[1].funder_display_name | Adaptable and Seamless Technology Transfer Program through Target-Driven R and D |
| biblio.issue | 5 |
| biblio.volume | 44 |
| biblio.last_page | 2978 |
| biblio.first_page | 2956 |
| topics[0].id | https://openalex.org/T10323 |
| topics[0].field.id | https://openalex.org/fields/22 |
| topics[0].field.display_name | Engineering |
| topics[0].score | 1.0 |
| topics[0].domain.id | https://openalex.org/domains/3 |
| topics[0].domain.display_name | Physical Sciences |
| topics[0].subfield.id | https://openalex.org/subfields/2204 |
| topics[0].subfield.display_name | Biomedical Engineering |
| topics[0].display_name | Analog and Mixed-Signal Circuit Design |
| topics[1].id | https://openalex.org/T11601 |
| topics[1].field.id | https://openalex.org/fields/28 |
| topics[1].field.display_name | Neuroscience |
| topics[1].score | 0.9995999932289124 |
| topics[1].domain.id | https://openalex.org/domains/1 |
| topics[1].domain.display_name | Life Sciences |
| topics[1].subfield.id | https://openalex.org/subfields/2804 |
| topics[1].subfield.display_name | Cellular and Molecular Neuroscience |
| topics[1].display_name | Neuroscience and Neural Engineering |
| topics[2].id | https://openalex.org/T10502 |
| topics[2].field.id | https://openalex.org/fields/22 |
| topics[2].field.display_name | Engineering |
| topics[2].score | 0.9994999766349792 |
| topics[2].domain.id | https://openalex.org/domains/3 |
| topics[2].domain.display_name | Physical Sciences |
| topics[2].subfield.id | https://openalex.org/subfields/2208 |
| topics[2].subfield.display_name | Electrical and Electronic Engineering |
| topics[2].display_name | Advanced Memory and Neural Computing |
| funders[0].id | https://openalex.org/F4320334764 |
| funders[0].ror | https://ror.org/00hhkn466 |
| funders[0].display_name | Japan Society for the Promotion of Science |
| funders[1].id | https://openalex.org/F4320338117 |
| funders[1].ror | |
| funders[1].display_name | Adaptable and Seamless Technology Transfer Program through Target-Driven R and D |
| is_xpac | False |
| apc_list | |
| apc_paid | |
| concepts[0].id | https://openalex.org/C11190779 |
| concepts[0].level | 3 |
| concepts[0].score | 0.6216788291931152 |
| concepts[0].wikidata | https://www.wikidata.org/wiki/Q664575 |
| concepts[0].display_name | Inverter |
| concepts[1].id | https://openalex.org/C206755178 |
| concepts[1].level | 2 |
| concepts[1].score | 0.5412383675575256 |
| concepts[1].wikidata | https://www.wikidata.org/wiki/Q1131271 |
| concepts[1].display_name | Capacitive sensing |
| concepts[2].id | https://openalex.org/C60154766 |
| concepts[2].level | 4 |
| concepts[2].score | 0.4794436991214752 |
| concepts[2].wikidata | https://www.wikidata.org/wiki/Q2650458 |
| concepts[2].display_name | Successive approximation ADC |
| concepts[3].id | https://openalex.org/C24326235 |
| concepts[3].level | 1 |
| concepts[3].score | 0.40441417694091797 |
| concepts[3].wikidata | https://www.wikidata.org/wiki/Q126095 |
| concepts[3].display_name | Electronic engineering |
| concepts[4].id | https://openalex.org/C41008148 |
| concepts[4].level | 0 |
| concepts[4].score | 0.38592690229415894 |
| concepts[4].wikidata | https://www.wikidata.org/wiki/Q21198 |
| concepts[4].display_name | Computer science |
| concepts[5].id | https://openalex.org/C119599485 |
| concepts[5].level | 1 |
| concepts[5].score | 0.27277663350105286 |
| concepts[5].wikidata | https://www.wikidata.org/wiki/Q43035 |
| concepts[5].display_name | Electrical engineering |
| concepts[6].id | https://openalex.org/C127413603 |
| concepts[6].level | 0 |
| concepts[6].score | 0.2439832091331482 |
| concepts[6].wikidata | https://www.wikidata.org/wiki/Q11023 |
| concepts[6].display_name | Engineering |
| concepts[7].id | https://openalex.org/C165801399 |
| concepts[7].level | 2 |
| concepts[7].score | 0.17230156064033508 |
| concepts[7].wikidata | https://www.wikidata.org/wiki/Q25428 |
| concepts[7].display_name | Voltage |
| concepts[8].id | https://openalex.org/C52192207 |
| concepts[8].level | 3 |
| concepts[8].score | 0.16844066977500916 |
| concepts[8].wikidata | https://www.wikidata.org/wiki/Q5322 |
| concepts[8].display_name | Capacitor |
| keywords[0].id | https://openalex.org/keywords/inverter |
| keywords[0].score | 0.6216788291931152 |
| keywords[0].display_name | Inverter |
| keywords[1].id | https://openalex.org/keywords/capacitive-sensing |
| keywords[1].score | 0.5412383675575256 |
| keywords[1].display_name | Capacitive sensing |
| keywords[2].id | https://openalex.org/keywords/successive-approximation-adc |
| keywords[2].score | 0.4794436991214752 |
| keywords[2].display_name | Successive approximation ADC |
| keywords[3].id | https://openalex.org/keywords/electronic-engineering |
| keywords[3].score | 0.40441417694091797 |
| keywords[3].display_name | Electronic engineering |
| keywords[4].id | https://openalex.org/keywords/computer-science |
| keywords[4].score | 0.38592690229415894 |
| keywords[4].display_name | Computer science |
| keywords[5].id | https://openalex.org/keywords/electrical-engineering |
| keywords[5].score | 0.27277663350105286 |
| keywords[5].display_name | Electrical engineering |
| keywords[6].id | https://openalex.org/keywords/engineering |
| keywords[6].score | 0.2439832091331482 |
| keywords[6].display_name | Engineering |
| keywords[7].id | https://openalex.org/keywords/voltage |
| keywords[7].score | 0.17230156064033508 |
| keywords[7].display_name | Voltage |
| keywords[8].id | https://openalex.org/keywords/capacitor |
| keywords[8].score | 0.16844066977500916 |
| keywords[8].display_name | Capacitor |
| language | en |
| locations[0].id | doi:10.1007/s00034-024-02963-0 |
| locations[0].is_oa | True |
| locations[0].source.id | https://openalex.org/S20109229 |
| locations[0].source.issn | 0278-081X, 1531-5878 |
| locations[0].source.type | journal |
| locations[0].source.is_oa | False |
| locations[0].source.issn_l | 0278-081X |
| locations[0].source.is_core | True |
| locations[0].source.is_in_doaj | False |
| locations[0].source.display_name | Circuits Systems and Signal Processing |
| locations[0].source.host_organization | https://openalex.org/P4310320186 |
| locations[0].source.host_organization_name | Birkhäuser |
| locations[0].source.host_organization_lineage | https://openalex.org/P4310320186, https://openalex.org/P4310319900 |
| locations[0].source.host_organization_lineage_names | Birkhäuser, Springer Science+Business Media |
| locations[0].license | cc-by |
| locations[0].pdf_url | https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdf |
| locations[0].version | publishedVersion |
| locations[0].raw_type | journal-article |
| locations[0].license_id | https://openalex.org/licenses/cc-by |
| locations[0].is_accepted | True |
| locations[0].is_published | True |
| locations[0].raw_source_name | Circuits, Systems, and Signal Processing |
| locations[0].landing_page_url | https://doi.org/10.1007/s00034-024-02963-0 |
| indexed_in | crossref |
| authorships[0].author.id | https://openalex.org/A5091746415 |
| authorships[0].author.orcid | https://orcid.org/0000-0002-0922-9755 |
| authorships[0].author.display_name | Shuowei Li |
| authorships[0].countries | JP |
| authorships[0].affiliations[0].institution_ids | https://openalex.org/I74801974 |
| authorships[0].affiliations[0].raw_affiliation_string | Department of Electrical Engineering and Information System, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| authorships[0].institutions[0].id | https://openalex.org/I74801974 |
| authorships[0].institutions[0].ror | https://ror.org/057zh3y96 |
| authorships[0].institutions[0].type | education |
| authorships[0].institutions[0].lineage | https://openalex.org/I74801974 |
| authorships[0].institutions[0].country_code | JP |
| authorships[0].institutions[0].display_name | The University of Tokyo |
| authorships[0].author_position | first |
| authorships[0].raw_author_name | Shuowei Li |
| authorships[0].is_corresponding | True |
| authorships[0].raw_affiliation_strings | Department of Electrical Engineering and Information System, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| authorships[1].author.id | https://openalex.org/A5083782865 |
| authorships[1].author.orcid | https://orcid.org/0000-0001-8539-8481 |
| authorships[1].author.display_name | Zunsong Yang |
| authorships[1].countries | JP |
| authorships[1].affiliations[0].institution_ids | https://openalex.org/I74801974 |
| authorships[1].affiliations[0].raw_affiliation_string | Systems Design Laboratory, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| authorships[1].institutions[0].id | https://openalex.org/I74801974 |
| authorships[1].institutions[0].ror | https://ror.org/057zh3y96 |
| authorships[1].institutions[0].type | education |
| authorships[1].institutions[0].lineage | https://openalex.org/I74801974 |
| authorships[1].institutions[0].country_code | JP |
| authorships[1].institutions[0].display_name | The University of Tokyo |
| authorships[1].author_position | middle |
| authorships[1].raw_author_name | Zunsong Yang |
| authorships[1].is_corresponding | False |
| authorships[1].raw_affiliation_strings | Systems Design Laboratory, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| authorships[2].author.id | https://openalex.org/A5007028121 |
| authorships[2].author.orcid | https://orcid.org/0000-0002-1512-4714 |
| authorships[2].author.display_name | Tetsuya Iizuka |
| authorships[2].countries | JP |
| authorships[2].affiliations[0].institution_ids | https://openalex.org/I74801974 |
| authorships[2].affiliations[0].raw_affiliation_string | Systems Design Laboratory, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| authorships[2].institutions[0].id | https://openalex.org/I74801974 |
| authorships[2].institutions[0].ror | https://ror.org/057zh3y96 |
| authorships[2].institutions[0].type | education |
| authorships[2].institutions[0].lineage | https://openalex.org/I74801974 |
| authorships[2].institutions[0].country_code | JP |
| authorships[2].institutions[0].display_name | The University of Tokyo |
| authorships[2].author_position | last |
| authorships[2].raw_author_name | Tetsuya Iizuka |
| authorships[2].is_corresponding | False |
| authorships[2].raw_affiliation_strings | Systems Design Laboratory, School of Engineering, The University of Tokyo, Hongo, Bunkyo, Tokyo, 113-0032, Japan |
| has_content.pdf | True |
| has_content.grobid_xml | True |
| is_paratext | False |
| open_access.is_oa | True |
| open_access.oa_url | https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdf |
| open_access.oa_status | hybrid |
| open_access.any_repository_has_fulltext | False |
| created_date | 2025-10-10T00:00:00 |
| display_name | An All-Standard-Cell-Based Synthesizable SAR ADC with Inverter-Cell-Based Capacitive DAC |
| has_fulltext | True |
| is_retracted | False |
| updated_date | 2025-11-06T03:46:38.306776 |
| primary_topic.id | https://openalex.org/T10323 |
| primary_topic.field.id | https://openalex.org/fields/22 |
| primary_topic.field.display_name | Engineering |
| primary_topic.score | 1.0 |
| primary_topic.domain.id | https://openalex.org/domains/3 |
| primary_topic.domain.display_name | Physical Sciences |
| primary_topic.subfield.id | https://openalex.org/subfields/2204 |
| primary_topic.subfield.display_name | Biomedical Engineering |
| primary_topic.display_name | Analog and Mixed-Signal Circuit Design |
| related_works | https://openalex.org/W4391375266, https://openalex.org/W2899084033, https://openalex.org/W2748952813, https://openalex.org/W3102847316, https://openalex.org/W3172386668, https://openalex.org/W2390279801, https://openalex.org/W3011006018, https://openalex.org/W2981692717, https://openalex.org/W4386571252, https://openalex.org/W4391913857 |
| cited_by_count | 2 |
| counts_by_year[0].year | 2025 |
| counts_by_year[0].cited_by_count | 2 |
| locations_count | 1 |
| best_oa_location.id | doi:10.1007/s00034-024-02963-0 |
| best_oa_location.is_oa | True |
| best_oa_location.source.id | https://openalex.org/S20109229 |
| best_oa_location.source.issn | 0278-081X, 1531-5878 |
| best_oa_location.source.type | journal |
| best_oa_location.source.is_oa | False |
| best_oa_location.source.issn_l | 0278-081X |
| best_oa_location.source.is_core | True |
| best_oa_location.source.is_in_doaj | False |
| best_oa_location.source.display_name | Circuits Systems and Signal Processing |
| best_oa_location.source.host_organization | https://openalex.org/P4310320186 |
| best_oa_location.source.host_organization_name | Birkhäuser |
| best_oa_location.source.host_organization_lineage | https://openalex.org/P4310320186, https://openalex.org/P4310319900 |
| best_oa_location.source.host_organization_lineage_names | Birkhäuser, Springer Science+Business Media |
| best_oa_location.license | cc-by |
| best_oa_location.pdf_url | https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdf |
| best_oa_location.version | publishedVersion |
| best_oa_location.raw_type | journal-article |
| best_oa_location.license_id | https://openalex.org/licenses/cc-by |
| best_oa_location.is_accepted | True |
| best_oa_location.is_published | True |
| best_oa_location.raw_source_name | Circuits, Systems, and Signal Processing |
| best_oa_location.landing_page_url | https://doi.org/10.1007/s00034-024-02963-0 |
| primary_location.id | doi:10.1007/s00034-024-02963-0 |
| primary_location.is_oa | True |
| primary_location.source.id | https://openalex.org/S20109229 |
| primary_location.source.issn | 0278-081X, 1531-5878 |
| primary_location.source.type | journal |
| primary_location.source.is_oa | False |
| primary_location.source.issn_l | 0278-081X |
| primary_location.source.is_core | True |
| primary_location.source.is_in_doaj | False |
| primary_location.source.display_name | Circuits Systems and Signal Processing |
| primary_location.source.host_organization | https://openalex.org/P4310320186 |
| primary_location.source.host_organization_name | Birkhäuser |
| primary_location.source.host_organization_lineage | https://openalex.org/P4310320186, https://openalex.org/P4310319900 |
| primary_location.source.host_organization_lineage_names | Birkhäuser, Springer Science+Business Media |
| primary_location.license | cc-by |
| primary_location.pdf_url | https://link.springer.com/content/pdf/10.1007/s00034-024-02963-0.pdf |
| primary_location.version | publishedVersion |
| primary_location.raw_type | journal-article |
| primary_location.license_id | https://openalex.org/licenses/cc-by |
| primary_location.is_accepted | True |
| primary_location.is_published | True |
| primary_location.raw_source_name | Circuits, Systems, and Signal Processing |
| primary_location.landing_page_url | https://doi.org/10.1007/s00034-024-02963-0 |
| publication_date | 2024-12-23 |
| publication_year | 2024 |
| referenced_works | https://openalex.org/W3016114585, https://openalex.org/W2897351503, https://openalex.org/W2791757449, https://openalex.org/W2022847884, https://openalex.org/W2019720625, https://openalex.org/W2891288687, https://openalex.org/W1969925016, https://openalex.org/W2790701163, https://openalex.org/W3154289504, https://openalex.org/W4223966183, https://openalex.org/W3045068248, https://openalex.org/W4312690233, https://openalex.org/W3001307815, https://openalex.org/W2943848730, https://openalex.org/W2152208424, https://openalex.org/W2795591835, https://openalex.org/W2140903142, https://openalex.org/W4235645058, https://openalex.org/W1983740965, https://openalex.org/W3209003531, https://openalex.org/W2537738414, https://openalex.org/W4285208820, https://openalex.org/W2918730494 |
| referenced_works_count | 23 |
| abstract_inverted_index.. | 91 |
| abstract_inverted_index.2 | 90 |
| abstract_inverted_index.V | 127 |
| abstract_inverted_index.W | 123 |
| abstract_inverted_index.a | 68, 81, 93, 125 |
| abstract_inverted_index.65 | 82 |
| abstract_inverted_index.An | 15 |
| abstract_inverted_index.an | 4, 47, 53 |
| abstract_inverted_index.at | 106 |
| abstract_inverted_index.be | 42, 60 |
| abstract_inverted_index.by | 20 |
| abstract_inverted_index.dB | 102, 105 |
| abstract_inverted_index.in | 46, 62, 80 |
| abstract_inverted_index.is | 18, 57, 78, 115 |
| abstract_inverted_index.mm | 89 |
| abstract_inverted_index.nm | 83 |
| abstract_inverted_index.of | 27, 135 |
| abstract_inverted_index.to | 36, 41, 59, 66, 131 |
| abstract_inverted_index.1.2 | 126 |
| abstract_inverted_index.425 | 116 |
| abstract_inverted_index.ADC | 8, 48 |
| abstract_inverted_index.FoM | 134 |
| abstract_inverted_index.S/H | 63 |
| abstract_inverted_index.SAR | 7 |
| abstract_inverted_index.The | 76, 112 |
| abstract_inverted_index.and | 24, 64, 98, 103 |
| abstract_inverted_index.any | 73 |
| abstract_inverted_index.but | 32 |
| abstract_inverted_index.for | 44 |
| abstract_inverted_index.the | 22, 28, 38, 96, 132 |
| abstract_inverted_index.}$$ | 118 |
| abstract_inverted_index.0.19 | 88 |
| abstract_inverted_index.0.86 | 136 |
| abstract_inverted_index.2.92 | 107 |
| abstract_inverted_index.46.2 | 104 |
| abstract_inverted_index.53.6 | 101 |
| abstract_inverted_index.CDAC | 65 |
| abstract_inverted_index.CMOS | 85 |
| abstract_inverted_index.MS/s | 108 |
| abstract_inverted_index.SFDR | 97 |
| abstract_inverted_index.SNDR | 99 |
| abstract_inverted_index.This | 1 |
| abstract_inverted_index.With | 92 |
| abstract_inverted_index.from | 124 |
| abstract_inverted_index.them | 34 |
| abstract_inverted_index.with | 9, 49 |
| abstract_inverted_index.8-bit | 5 |
| abstract_inverted_index.cells | 30 |
| abstract_inverted_index.fully | 69 |
| abstract_inverted_index.leads | 130 |
| abstract_inverted_index.paper | 2 |
| abstract_inverted_index.ports | 26 |
| abstract_inverted_index.power | 113 |
| abstract_inverted_index.reach | 100 |
| abstract_inverted_index.which | 129 |
| abstract_inverted_index.$${\mu | 117 |
| abstract_inverted_index.Walden | 133 |
| abstract_inverted_index.analog | 55 |
| abstract_inverted_index.cells. | 75 |
| abstract_inverted_index.design | 71 |
| abstract_inverted_index.ground | 25 |
| abstract_inverted_index.input, | 95 |
| abstract_inverted_index.supply | 23 |
| abstract_inverted_index.switch | 56 |
| abstract_inverted_index.Nyquist | 94 |
| abstract_inverted_index.achieve | 67 |
| abstract_inverted_index.floated | 35 |
| abstract_inverted_index.leaving | 33 |
| abstract_inverted_index.process | 86 |
| abstract_inverted_index.supply, | 128 |
| abstract_inverted_index.voltage | 39 |
| abstract_inverted_index.without | 72, 110 |
| abstract_inverted_index.(CDACs). | 14 |
| abstract_inverted_index.Abstract | 0 |
| abstract_inverted_index.employed | 61 |
| abstract_inverted_index.inverter | 29 |
| abstract_inverted_index.moderate | 50 |
| abstract_inverted_index.proposed | 19, 58 |
| abstract_inverted_index.proposes | 3 |
| abstract_inverted_index.standard | 84 |
| abstract_inverted_index.suitable | 43 |
| abstract_inverted_index.suppress | 37 |
| abstract_inverted_index.together | 31 |
| abstract_inverted_index.<mml:math | 119 |
| abstract_inverted_index.capacitor | 17 |
| abstract_inverted_index.occupying | 87 |
| abstract_inverted_index.prototype | 77 |
| abstract_inverted_index.capacitive | 11 |
| abstract_inverted_index.connecting | 21 |
| abstract_inverted_index.converters | 13 |
| abstract_inverted_index.dependence | 40 |
| abstract_inverted_index.employment | 45 |
| abstract_inverted_index.fabricated | 79 |
| abstract_inverted_index.</mml:math> | 122 |
| abstract_inverted_index.consumption | 114 |
| abstract_inverted_index.resolution. | 51 |
| abstract_inverted_index.Furthermore, | 52 |
| abstract_inverted_index.calibration. | 111 |
| abstract_inverted_index.respectively | 109 |
| abstract_inverted_index.synthesizable | 6 |
| abstract_inverted_index.pJ/conv.-step. | 137 |
| abstract_inverted_index.custom-designed | 74 |
| abstract_inverted_index.digital-to-analog | 12 |
| abstract_inverted_index.<mml:mi>μ</mml:mi> | 121 |
| abstract_inverted_index.inverter-cell-based | 10, 16, 54 |
| abstract_inverted_index.standard-cell-based | 70 |
| abstract_inverted_index.xmlns:mml="http://www.w3.org/1998/Math/MathML"> | 120 |
| cited_by_percentile_year.max | 97 |
| cited_by_percentile_year.min | 95 |
| corresponding_author_ids | https://openalex.org/A5091746415 |
| countries_distinct_count | 1 |
| institutions_distinct_count | 3 |
| corresponding_institution_ids | https://openalex.org/I74801974 |
| citation_normalized_percentile.value | 0.65253366 |
| citation_normalized_percentile.is_in_top_1_percent | False |
| citation_normalized_percentile.is_in_top_10_percent | False |