Design and Performance Evaluation of SRAM Processing in Memory Using TSMC 90nm CMOS Technology Article Swipe
YOU?
·
· 2025
· Open Access
·
· DOI: https://doi.org/10.54644/jte.2025.1797
Memory is a crucial component in electronic circuits, especially in embedded devices. With the rapid development of AI and Machine Learning, the demand for processing large amounts of data has exposed the limitations of CPUs and the high costs of GPUs. The Processing-In-Memory (PIM) architecture addresses the bottleneck issue by integrating processing capabilities directly into memory. Static random-access memory (SRAM), a high-speed memory type, is commonly used as cache and main memory in CPUs. Integrating processing directly into SRAM, SRAM-based processing in memory enhances performance and alleviates bottleneck problems. In this study, the design and evaluation of two 64-bit SRAM Processing-In-Memory architectures were implemented on TSMC’s 90nm technology using Cadence Virtuoso software. Computational operations, such as ternary multiplication, were simulated and analyzed its power consumption under PVT conditions evaluate the stability and accuracy. The research results provide a deeper understanding of SRAM-based in-memory processing design, improve knowledge and skills in circuit design, and propose further developments for SRAM Processing-In-Memory in the future.
Related Topics
- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.54644/jte.2025.1797
- https://jte.edu.vn/index.php/jte/article/download/1797/1486
- OA Status
- diamond
- References
- 6
- OpenAlex ID
- https://openalex.org/W4414340408
Raw OpenAlex JSON
- OpenAlex ID
-
https://openalex.org/W4414340408Canonical identifier for this work in OpenAlex
- DOI
-
https://doi.org/10.54644/jte.2025.1797Digital Object Identifier
- Title
-
Design and Performance Evaluation of SRAM Processing in Memory Using TSMC 90nm CMOS TechnologyWork title
- Type
-
articleOpenAlex work type
- Language
-
enPrimary language
- Publication year
-
2025Year of publication
- Publication date
-
2025-09-18Full publication date if available
- Authors
-
Tuan A. Vu, T. P. Bui, Doan B. Hoang, Khoa Van PhamList of authors in order
- Landing page
-
https://doi.org/10.54644/jte.2025.1797Publisher landing page
- PDF URL
-
https://jte.edu.vn/index.php/jte/article/download/1797/1486Direct link to full text PDF
- Open access
-
YesWhether a free full text is available
- OA status
-
diamondOpen access status per OpenAlex
- OA URL
-
https://jte.edu.vn/index.php/jte/article/download/1797/1486Direct OA link when available
- Cited by
-
0Total citation count in OpenAlex
- References (count)
-
6Number of works referenced by this work
Full payload
| id | https://openalex.org/W4414340408 |
|---|---|
| doi | https://doi.org/10.54644/jte.2025.1797 |
| ids.doi | https://doi.org/10.54644/jte.2025.1797 |
| ids.openalex | https://openalex.org/W4414340408 |
| fwci | 0.0 |
| type | article |
| title | Design and Performance Evaluation of SRAM Processing in Memory Using TSMC 90nm CMOS Technology |
| biblio.issue | |
| biblio.volume | |
| biblio.last_page | |
| biblio.first_page | |
| topics[0].id | https://openalex.org/T10502 |
| topics[0].field.id | https://openalex.org/fields/22 |
| topics[0].field.display_name | Engineering |
| topics[0].score | 1.0 |
| topics[0].domain.id | https://openalex.org/domains/3 |
| topics[0].domain.display_name | Physical Sciences |
| topics[0].subfield.id | https://openalex.org/subfields/2208 |
| topics[0].subfield.display_name | Electrical and Electronic Engineering |
| topics[0].display_name | Advanced Memory and Neural Computing |
| topics[1].id | https://openalex.org/T12808 |
| topics[1].field.id | https://openalex.org/fields/22 |
| topics[1].field.display_name | Engineering |
| topics[1].score | 0.9994999766349792 |
| topics[1].domain.id | https://openalex.org/domains/3 |
| topics[1].domain.display_name | Physical Sciences |
| topics[1].subfield.id | https://openalex.org/subfields/2208 |
| topics[1].subfield.display_name | Electrical and Electronic Engineering |
| topics[1].display_name | Ferroelectric and Negative Capacitance Devices |
| topics[2].id | https://openalex.org/T11601 |
| topics[2].field.id | https://openalex.org/fields/28 |
| topics[2].field.display_name | Neuroscience |
| topics[2].score | 0.9986000061035156 |
| topics[2].domain.id | https://openalex.org/domains/1 |
| topics[2].domain.display_name | Life Sciences |
| topics[2].subfield.id | https://openalex.org/subfields/2804 |
| topics[2].subfield.display_name | Cellular and Molecular Neuroscience |
| topics[2].display_name | Neuroscience and Neural Engineering |
| is_xpac | False |
| apc_list | |
| apc_paid | |
| language | en |
| locations[0].id | doi:10.54644/jte.2025.1797 |
| locations[0].is_oa | True |
| locations[0].source.id | https://openalex.org/S4210205708 |
| locations[0].source.issn | 1859-1272, 2615-9740 |
| locations[0].source.type | journal |
| locations[0].source.is_oa | True |
| locations[0].source.issn_l | 1859-1272 |
| locations[0].source.is_core | False |
| locations[0].source.is_in_doaj | False |
| locations[0].source.display_name | Technical Education Science/Giáo dục Kỹ thuật |
| locations[0].source.host_organization | |
| locations[0].source.host_organization_name | |
| locations[0].license | cc-by-nc |
| locations[0].pdf_url | https://jte.edu.vn/index.php/jte/article/download/1797/1486 |
| locations[0].version | publishedVersion |
| locations[0].raw_type | journal-article |
| locations[0].license_id | https://openalex.org/licenses/cc-by-nc |
| locations[0].is_accepted | True |
| locations[0].is_published | True |
| locations[0].raw_source_name | Journal of Technical Education Science |
| locations[0].landing_page_url | https://doi.org/10.54644/jte.2025.1797 |
| indexed_in | crossref |
| authorships[0].author.id | https://openalex.org/A5041664690 |
| authorships[0].author.orcid | https://orcid.org/0000-0002-5546-4422 |
| authorships[0].author.display_name | Tuan A. Vu |
| authorships[0].countries | VN |
| authorships[0].affiliations[0].institution_ids | https://openalex.org/I4210148201 |
| authorships[0].affiliations[0].raw_affiliation_string | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[0].institutions[0].id | https://openalex.org/I4210148201 |
| authorships[0].institutions[0].ror | https://ror.org/05hzn5427 |
| authorships[0].institutions[0].type | education |
| authorships[0].institutions[0].lineage | https://openalex.org/I4210148201 |
| authorships[0].institutions[0].country_code | VN |
| authorships[0].institutions[0].display_name | Ho Chi Minh City University of Technology and Education |
| authorships[0].author_position | first |
| authorships[0].raw_author_name | None Thanh-Trung Vu |
| authorships[0].is_corresponding | True |
| authorships[0].raw_affiliation_strings | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[1].author.id | https://openalex.org/A5035272354 |
| authorships[1].author.orcid | https://orcid.org/0000-0001-9189-0405 |
| authorships[1].author.display_name | T. P. Bui |
| authorships[1].countries | VN |
| authorships[1].affiliations[0].institution_ids | https://openalex.org/I4210148201 |
| authorships[1].affiliations[0].raw_affiliation_string | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[1].institutions[0].id | https://openalex.org/I4210148201 |
| authorships[1].institutions[0].ror | https://ror.org/05hzn5427 |
| authorships[1].institutions[0].type | education |
| authorships[1].institutions[0].lineage | https://openalex.org/I4210148201 |
| authorships[1].institutions[0].country_code | VN |
| authorships[1].institutions[0].display_name | Ho Chi Minh City University of Technology and Education |
| authorships[1].author_position | middle |
| authorships[1].raw_author_name | None Tuan-Khuong Bui |
| authorships[1].is_corresponding | True |
| authorships[1].raw_affiliation_strings | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[2].author.id | https://openalex.org/A5035920418 |
| authorships[2].author.orcid | https://orcid.org/0000-0003-1798-4926 |
| authorships[2].author.display_name | Doan B. Hoang |
| authorships[2].countries | VN |
| authorships[2].affiliations[0].institution_ids | https://openalex.org/I4210148201 |
| authorships[2].affiliations[0].raw_affiliation_string | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[2].institutions[0].id | https://openalex.org/I4210148201 |
| authorships[2].institutions[0].ror | https://ror.org/05hzn5427 |
| authorships[2].institutions[0].type | education |
| authorships[2].institutions[0].lineage | https://openalex.org/I4210148201 |
| authorships[2].institutions[0].country_code | VN |
| authorships[2].institutions[0].display_name | Ho Chi Minh City University of Technology and Education |
| authorships[2].author_position | middle |
| authorships[2].raw_author_name | None Duc-Huy Hoang |
| authorships[2].is_corresponding | True |
| authorships[2].raw_affiliation_strings | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[3].author.id | https://openalex.org/A5062934104 |
| authorships[3].author.orcid | https://orcid.org/0000-0002-6129-5856 |
| authorships[3].author.display_name | Khoa Van Pham |
| authorships[3].countries | VN |
| authorships[3].affiliations[0].institution_ids | https://openalex.org/I4210148201 |
| authorships[3].affiliations[0].raw_affiliation_string | Ho Chi Minh City University of Technology and Education, Vietnam |
| authorships[3].institutions[0].id | https://openalex.org/I4210148201 |
| authorships[3].institutions[0].ror | https://ror.org/05hzn5427 |
| authorships[3].institutions[0].type | education |
| authorships[3].institutions[0].lineage | https://openalex.org/I4210148201 |
| authorships[3].institutions[0].country_code | VN |
| authorships[3].institutions[0].display_name | Ho Chi Minh City University of Technology and Education |
| authorships[3].author_position | last |
| authorships[3].raw_author_name | Van-Khoa Pham |
| authorships[3].is_corresponding | True |
| authorships[3].raw_affiliation_strings | Ho Chi Minh City University of Technology and Education, Vietnam |
| has_content.pdf | True |
| has_content.grobid_xml | True |
| is_paratext | False |
| open_access.is_oa | True |
| open_access.oa_url | https://jte.edu.vn/index.php/jte/article/download/1797/1486 |
| open_access.oa_status | diamond |
| open_access.any_repository_has_fulltext | False |
| created_date | 2025-10-10T00:00:00 |
| display_name | Design and Performance Evaluation of SRAM Processing in Memory Using TSMC 90nm CMOS Technology |
| has_fulltext | False |
| is_retracted | False |
| updated_date | 2025-11-06T03:46:38.306776 |
| primary_topic.id | https://openalex.org/T10502 |
| primary_topic.field.id | https://openalex.org/fields/22 |
| primary_topic.field.display_name | Engineering |
| primary_topic.score | 1.0 |
| primary_topic.domain.id | https://openalex.org/domains/3 |
| primary_topic.domain.display_name | Physical Sciences |
| primary_topic.subfield.id | https://openalex.org/subfields/2208 |
| primary_topic.subfield.display_name | Electrical and Electronic Engineering |
| primary_topic.display_name | Advanced Memory and Neural Computing |
| cited_by_count | 0 |
| locations_count | 1 |
| best_oa_location.id | doi:10.54644/jte.2025.1797 |
| best_oa_location.is_oa | True |
| best_oa_location.source.id | https://openalex.org/S4210205708 |
| best_oa_location.source.issn | 1859-1272, 2615-9740 |
| best_oa_location.source.type | journal |
| best_oa_location.source.is_oa | True |
| best_oa_location.source.issn_l | 1859-1272 |
| best_oa_location.source.is_core | False |
| best_oa_location.source.is_in_doaj | False |
| best_oa_location.source.display_name | Technical Education Science/Giáo dục Kỹ thuật |
| best_oa_location.source.host_organization | |
| best_oa_location.source.host_organization_name | |
| best_oa_location.license | cc-by-nc |
| best_oa_location.pdf_url | https://jte.edu.vn/index.php/jte/article/download/1797/1486 |
| best_oa_location.version | publishedVersion |
| best_oa_location.raw_type | journal-article |
| best_oa_location.license_id | https://openalex.org/licenses/cc-by-nc |
| best_oa_location.is_accepted | True |
| best_oa_location.is_published | True |
| best_oa_location.raw_source_name | Journal of Technical Education Science |
| best_oa_location.landing_page_url | https://doi.org/10.54644/jte.2025.1797 |
| primary_location.id | doi:10.54644/jte.2025.1797 |
| primary_location.is_oa | True |
| primary_location.source.id | https://openalex.org/S4210205708 |
| primary_location.source.issn | 1859-1272, 2615-9740 |
| primary_location.source.type | journal |
| primary_location.source.is_oa | True |
| primary_location.source.issn_l | 1859-1272 |
| primary_location.source.is_core | False |
| primary_location.source.is_in_doaj | False |
| primary_location.source.display_name | Technical Education Science/Giáo dục Kỹ thuật |
| primary_location.source.host_organization | |
| primary_location.source.host_organization_name | |
| primary_location.license | cc-by-nc |
| primary_location.pdf_url | https://jte.edu.vn/index.php/jte/article/download/1797/1486 |
| primary_location.version | publishedVersion |
| primary_location.raw_type | journal-article |
| primary_location.license_id | https://openalex.org/licenses/cc-by-nc |
| primary_location.is_accepted | True |
| primary_location.is_published | True |
| primary_location.raw_source_name | Journal of Technical Education Science |
| primary_location.landing_page_url | https://doi.org/10.54644/jte.2025.1797 |
| publication_date | 2025-09-18 |
| publication_year | 2025 |
| referenced_works | https://openalex.org/W2041446224, https://openalex.org/W4380520345, https://openalex.org/W4404471204, https://openalex.org/W4321062910, https://openalex.org/W4284991103, https://openalex.org/W3121712272 |
| referenced_works_count | 6 |
| abstract_inverted_index.a | 2, 60, 137 |
| abstract_inverted_index.AI | 17 |
| abstract_inverted_index.In | 89 |
| abstract_inverted_index.as | 67, 115 |
| abstract_inverted_index.by | 49 |
| abstract_inverted_index.in | 5, 9, 72, 81, 149, 159 |
| abstract_inverted_index.is | 1, 64 |
| abstract_inverted_index.of | 16, 27, 33, 39, 96, 140 |
| abstract_inverted_index.on | 104 |
| abstract_inverted_index.PVT | 126 |
| abstract_inverted_index.The | 41, 133 |
| abstract_inverted_index.and | 18, 35, 69, 85, 94, 120, 131, 147, 152 |
| abstract_inverted_index.for | 23, 156 |
| abstract_inverted_index.has | 29 |
| abstract_inverted_index.its | 122 |
| abstract_inverted_index.the | 13, 21, 31, 36, 46, 92, 129, 160 |
| abstract_inverted_index.two | 97 |
| abstract_inverted_index.90nm | 106 |
| abstract_inverted_index.CPUs | 34 |
| abstract_inverted_index.SRAM | 99, 157 |
| abstract_inverted_index.With | 12 |
| abstract_inverted_index.data | 28 |
| abstract_inverted_index.high | 37 |
| abstract_inverted_index.into | 54, 77 |
| abstract_inverted_index.main | 70 |
| abstract_inverted_index.such | 114 |
| abstract_inverted_index.this | 90 |
| abstract_inverted_index.used | 66 |
| abstract_inverted_index.were | 102, 118 |
| abstract_inverted_index.(PIM) | 43 |
| abstract_inverted_index.CPUs. | 73 |
| abstract_inverted_index.GPUs. | 40 |
| abstract_inverted_index.SRAM, | 78 |
| abstract_inverted_index.cache | 68 |
| abstract_inverted_index.costs | 38 |
| abstract_inverted_index.issue | 48 |
| abstract_inverted_index.large | 25 |
| abstract_inverted_index.power | 123 |
| abstract_inverted_index.rapid | 14 |
| abstract_inverted_index.type, | 63 |
| abstract_inverted_index.under | 125 |
| abstract_inverted_index.using | 108 |
| abstract_inverted_index.64-bit | 98 |
| abstract_inverted_index.Memory | 0 |
| abstract_inverted_index.Static | 56 |
| abstract_inverted_index.deeper | 138 |
| abstract_inverted_index.demand | 22 |
| abstract_inverted_index.design | 93 |
| abstract_inverted_index.memory | 58, 62, 71, 82 |
| abstract_inverted_index.skills | 148 |
| abstract_inverted_index.study, | 91 |
| abstract_inverted_index.(SRAM), | 59 |
| abstract_inverted_index.Cadence | 109 |
| abstract_inverted_index.Machine | 19 |
| abstract_inverted_index.amounts | 26 |
| abstract_inverted_index.circuit | 150 |
| abstract_inverted_index.crucial | 3 |
| abstract_inverted_index.design, | 144, 151 |
| abstract_inverted_index.exposed | 30 |
| abstract_inverted_index.further | 154 |
| abstract_inverted_index.future. | 161 |
| abstract_inverted_index.improve | 145 |
| abstract_inverted_index.memory. | 55 |
| abstract_inverted_index.propose | 153 |
| abstract_inverted_index.provide | 136 |
| abstract_inverted_index.results | 135 |
| abstract_inverted_index.ternary | 116 |
| abstract_inverted_index.TSMC’s | 105 |
| abstract_inverted_index.Virtuoso | 110 |
| abstract_inverted_index.analyzed | 121 |
| abstract_inverted_index.commonly | 65 |
| abstract_inverted_index.devices. | 11 |
| abstract_inverted_index.directly | 53, 76 |
| abstract_inverted_index.embedded | 10 |
| abstract_inverted_index.enhances | 83 |
| abstract_inverted_index.evaluate | 128 |
| abstract_inverted_index.research | 134 |
| abstract_inverted_index.Learning, | 20 |
| abstract_inverted_index.accuracy. | 132 |
| abstract_inverted_index.addresses | 45 |
| abstract_inverted_index.circuits, | 7 |
| abstract_inverted_index.component | 4 |
| abstract_inverted_index.in-memory | 142 |
| abstract_inverted_index.knowledge | 146 |
| abstract_inverted_index.problems. | 88 |
| abstract_inverted_index.simulated | 119 |
| abstract_inverted_index.software. | 111 |
| abstract_inverted_index.stability | 130 |
| abstract_inverted_index.SRAM-based | 79, 141 |
| abstract_inverted_index.alleviates | 86 |
| abstract_inverted_index.bottleneck | 47, 87 |
| abstract_inverted_index.conditions | 127 |
| abstract_inverted_index.electronic | 6 |
| abstract_inverted_index.especially | 8 |
| abstract_inverted_index.evaluation | 95 |
| abstract_inverted_index.high-speed | 61 |
| abstract_inverted_index.processing | 24, 51, 75, 80, 143 |
| abstract_inverted_index.technology | 107 |
| abstract_inverted_index.Integrating | 74 |
| abstract_inverted_index.consumption | 124 |
| abstract_inverted_index.development | 15 |
| abstract_inverted_index.implemented | 103 |
| abstract_inverted_index.integrating | 50 |
| abstract_inverted_index.limitations | 32 |
| abstract_inverted_index.operations, | 113 |
| abstract_inverted_index.performance | 84 |
| abstract_inverted_index.architecture | 44 |
| abstract_inverted_index.capabilities | 52 |
| abstract_inverted_index.developments | 155 |
| abstract_inverted_index.Computational | 112 |
| abstract_inverted_index.architectures | 101 |
| abstract_inverted_index.random-access | 57 |
| abstract_inverted_index.understanding | 139 |
| abstract_inverted_index.multiplication, | 117 |
| abstract_inverted_index.Processing-In-Memory | 42, 100, 158 |
| cited_by_percentile_year | |
| corresponding_author_ids | https://openalex.org/A5035272354, https://openalex.org/A5035920418, https://openalex.org/A5062934104, https://openalex.org/A5041664690 |
| countries_distinct_count | 1 |
| institutions_distinct_count | 4 |
| corresponding_institution_ids | https://openalex.org/I4210148201 |
| citation_normalized_percentile.value | 0.48178091 |
| citation_normalized_percentile.is_in_top_1_percent | False |
| citation_normalized_percentile.is_in_top_10_percent | False |