Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining Article Swipe
Hoai Luan Pham
,
Thi Hong Tran
,
Tri Dung Phan
,
Vu Trung Duong Le
,
Duc Khai Lam
,
Yasuhiko Nakashima
·
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1109/access.2020.3012581
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1109/access.2020.3012581
In the Bitcoin network, computing double SHA-256 values consumes most of the network energy. Therefore, reducing the power consumption and increasing the processing rate for the double SHA256 algorithm is currently an important research trend. In this paper, we propose a high-data-rate low-power hardware architecture named the compact message expander (CME) double SHA-256. The CME double SHA-256 architecture combines resource sharing and fully unrolled datapath technologies to achieve both a high data rate and low power consumption. Notably, the CME algorithm utilizes the double SHA-256 input data characteristics to further reduce the hardware cost and power consumption. A review of the literature shows that the CME algorithm eliminates at least 9.68% of the 32-bit XOR gates, 16.49% of the 32-bit adders, and 16.79% of the registers required to calculate double SHA-256. We synthesized and laid out the CME double SHA-256 using CMOS 0.18 μm technology. The hardware cost of the synthesized circuit is approximately 13.88% less than that of the conventional approach. The chip layout size is 5.9 mm×5.9 mm, and the correctness of the circuit was verified on a real hardware platform (ZCU 102). The throughput of the proposed architecture is 61.44 Gbps on an ASIC with Rohm 180nm CMOS standard cell library and 340 Gbps on a FinFET FPGA 16nm Zynq UltraScale+ MPSoC ZCU102.
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Metadata
- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.1109/access.2020.3012581
- https://ieeexplore.ieee.org/ielx7/6287639/8948470/09151160.pdf
- OA Status
- gold
- Cited By
- 41
- References
- 37
- Related Works
- 10
- OpenAlex ID
- https://openalex.org/W3046120162
All OpenAlex metadata
Raw OpenAlex JSON
- OpenAlex ID
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https://openalex.org/W3046120162Canonical identifier for this work in OpenAlex
- DOI
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https://doi.org/10.1109/access.2020.3012581Digital Object Identifier
- Title
-
Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin MiningWork title
- Type
-
articleOpenAlex work type
- Language
-
enPrimary language
- Publication year
-
2020Year of publication
- Publication date
-
2020-01-01Full publication date if available
- Authors
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Hoai Luan Pham, Thi Hong Tran, Tri Dung Phan, Vu Trung Duong Le, Duc Khai Lam, Yasuhiko NakashimaList of authors in order
- Landing page
-
https://doi.org/10.1109/access.2020.3012581Publisher landing page
- PDF URL
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https://ieeexplore.ieee.org/ielx7/6287639/8948470/09151160.pdfDirect link to full text PDF
- Open access
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YesWhether a free full text is available
- OA status
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goldOpen access status per OpenAlex
- OA URL
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https://ieeexplore.ieee.org/ielx7/6287639/8948470/09151160.pdfDirect OA link when available
- Concepts
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Computer science, Datapath, Field-programmable gate array, Computer hardware, Embedded system, Throughput, Application-specific integrated circuit, MPSoC, Gate count, Energy consumption, System on a chip, Operating system, Wireless, Electrical engineering, EngineeringTop concepts (fields/topics) attached by OpenAlex
- Cited by
-
41Total citation count in OpenAlex
- Citations by year (recent)
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2025: 7, 2024: 12, 2023: 8, 2022: 9, 2021: 5Per-year citation counts (last 5 years)
- References (count)
-
37Number of works referenced by this work
- Related works (count)
-
10Other works algorithmically related by OpenAlex
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