FPGA Implementation of Protected Compact AES S–Box Using CQCG for Embedded Applications Article Swipe

PDF

R. Sornalatha , N. Janakiraman , Karthigha Balamurugan , Arun Kumar Sivaraman , Rajiv Vincent , A. Muralidhar ·

YOU? · · 2021 · Open Access · · DOI: https://doi.org/10.3233/apc210073

In this work, we obtain an area proficient composite field arithmetic Advanced Encryption Standard (AES) Substitution (S) byte and its inverse logic design. The size of this design is calculated by the number of gates used for hardware implementation. Most of the existing AES Substitution box hardware implementation uses separate Substitution byte and its inverse hardware structures. But we implement the both in the same module and a control signal is used to select the substitution byte for encryption operation and its inverse for the decryption operation. By comparing the gate utilization of the previous AES S–Box implementation, we reduced the gate utilization up to 5% that is we take only 78 EX-OR gates and 36 AND gates for implementing the both Substitution byte and its inverse. While implementing an AES algorithm in circuitry or programming, it is liable to be detected by hackers using any one of the side channel attacks. Data to be added with a random bit sequence to prevent from the above mentioned side channel attacks.

Related Topics

Computer Science

Advanced Encryption Standard

Field-Programmable Gate Array

Concepts

Byte S-box Computer science Advanced Encryption Standard Field-programmable gate array Encryption Substitution (logic) Gate array Side channel attack AES implementations Inverse Computer hardware Arithmetic Embedded system Gate count Cryptography Parallel computing Algorithm Mathematics Operating system Programming language Block cipher Geometry

Metadata

Type: book-chapter
Language: en
Landing Page: https://doi.org/10.3233/apc210073
PDF: https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073
OA Status: diamond
Cited By: 10
References: 9
Related Works: 10
OpenAlex ID: https://openalex.org/W3207835159

All OpenAlex metadata

Raw OpenAlex JSON

OpenAlex ID: https://openalex.org/W3207835159

Canonical identifier for this work in OpenAlex
DOI: https://doi.org/10.3233/apc210073

Digital Object Identifier
Title: FPGA Implementation of Protected Compact AES S–Box Using CQCG for Embedded Applications

Work title
Type: book-chapter

OpenAlex work type
Language: en

Primary language
Publication year: 2021

Year of publication
Publication date: 2021-10-04

Full publication date if available
Authors: R. Sornalatha, N. Janakiraman, Karthigha Balamurugan, Arun Kumar Sivaraman, Rajiv Vincent, A. Muralidhar

List of authors in order
Landing page: https://doi.org/10.3233/apc210073

Publisher landing page
PDF URL: https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073

Direct link to full text PDF
Open access: Yes

Whether a free full text is available
OA status: diamond

Open access status per OpenAlex
OA URL: https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073

Direct OA link when available
Concepts: Byte, S-box, Computer science, Advanced Encryption Standard, Field-programmable gate array, Encryption, Substitution (logic), Gate array, Side channel attack, AES implementations, Inverse, Computer hardware, Arithmetic, Embedded system, Gate count, Cryptography, Parallel computing, Algorithm, Mathematics, Operating system, Programming language, Block cipher, Geometry

Top concepts (fields/topics) attached by OpenAlex
Cited by: 10

Total citation count in OpenAlex
Citations by year (recent): 2023: 3, 2022: 7

Per-year citation counts (last 5 years)
References (count): 9

Number of works referenced by this work
Related works (count): 10

Other works algorithmically related by OpenAlex

Full payload

id	https://openalex.org/W3207835159
doi	https://doi.org/10.3233/apc210073
ids.doi	https://doi.org/10.3233/apc210073
ids.mag	3207835159
ids.openalex	https://openalex.org/W3207835159
fwci	3.35780347
type	book-chapter
title	FPGA Implementation of Protected Compact AES S–Box Using CQCG for Embedded Applications
biblio.issue
biblio.volume
biblio.last_page
biblio.first_page
topics[0].id	https://openalex.org/T10951
topics[0].field.id	https://openalex.org/fields/17
topics[0].field.display_name	Computer Science
topics[0].score	0.9998000264167786
topics[0].domain.id	https://openalex.org/domains/3
topics[0].domain.display_name	Physical Sciences
topics[0].subfield.id	https://openalex.org/subfields/1702
topics[0].subfield.display_name	Artificial Intelligence
topics[0].display_name	Cryptographic Implementations and Security
topics[1].id	https://openalex.org/T11017
topics[1].field.id	https://openalex.org/fields/17
topics[1].field.display_name	Computer Science
topics[1].score	0.9987000226974487
topics[1].domain.id	https://openalex.org/domains/3
topics[1].domain.display_name	Physical Sciences
topics[1].subfield.id	https://openalex.org/subfields/1707
topics[1].subfield.display_name	Computer Vision and Pattern Recognition
topics[1].display_name	Chaos-based Image/Signal Encryption
topics[2].id	https://openalex.org/T11130
topics[2].field.id	https://openalex.org/fields/17
topics[2].field.display_name	Computer Science
topics[2].score	0.9957000017166138
topics[2].domain.id	https://openalex.org/domains/3
topics[2].domain.display_name	Physical Sciences
topics[2].subfield.id	https://openalex.org/subfields/1702
topics[2].subfield.display_name	Artificial Intelligence
topics[2].display_name	Coding theory and cryptography
is_xpac	False
apc_list
apc_paid
concepts[0].id	https://openalex.org/C43364308
concepts[0].level	2
concepts[0].score	0.834472119808197
concepts[0].wikidata	https://www.wikidata.org/wiki/Q8799
concepts[0].display_name	Byte
concepts[1].id	https://openalex.org/C45737032
concepts[1].level	4
concepts[1].score	0.8047157526016235
concepts[1].wikidata	https://www.wikidata.org/wiki/Q748364
concepts[1].display_name	S-box
concepts[2].id	https://openalex.org/C41008148
concepts[2].level	0
concepts[2].score	0.6884166598320007
concepts[2].wikidata	https://www.wikidata.org/wiki/Q21198
concepts[2].display_name	Computer science
concepts[3].id	https://openalex.org/C94520183
concepts[3].level	3
concepts[3].score	0.6831363439559937
concepts[3].wikidata	https://www.wikidata.org/wiki/Q190746
concepts[3].display_name	Advanced Encryption Standard
concepts[4].id	https://openalex.org/C42935608
concepts[4].level	2
concepts[4].score	0.6807248592376709
concepts[4].wikidata	https://www.wikidata.org/wiki/Q190411
concepts[4].display_name	Field-programmable gate array
concepts[5].id	https://openalex.org/C148730421
concepts[5].level	2
concepts[5].score	0.6000943183898926
concepts[5].wikidata	https://www.wikidata.org/wiki/Q141090
concepts[5].display_name	Encryption
concepts[6].id	https://openalex.org/C2778220771
concepts[6].level	2
concepts[6].score	0.5289725661277771
concepts[6].wikidata	https://www.wikidata.org/wiki/Q1522579
concepts[6].display_name	Substitution (logic)
concepts[7].id	https://openalex.org/C114237110
concepts[7].level	3
concepts[7].score	0.517859697341919
concepts[7].wikidata	https://www.wikidata.org/wiki/Q114901
concepts[7].display_name	Gate array
concepts[8].id	https://openalex.org/C49289754
concepts[8].level	3
concepts[8].score	0.5097886919975281
concepts[8].wikidata	https://www.wikidata.org/wiki/Q2267081
concepts[8].display_name	Side channel attack
concepts[9].id	https://openalex.org/C46331935
concepts[9].level	4
concepts[9].score	0.5014750957489014
concepts[9].wikidata	https://www.wikidata.org/wiki/Q4651362
concepts[9].display_name	AES implementations
concepts[10].id	https://openalex.org/C207467116
concepts[10].level	2
concepts[10].score	0.47962817549705505
concepts[10].wikidata	https://www.wikidata.org/wiki/Q4385666
concepts[10].display_name	Inverse
concepts[11].id	https://openalex.org/C9390403
concepts[11].level	1
concepts[11].score	0.4733597934246063
concepts[11].wikidata	https://www.wikidata.org/wiki/Q3966
concepts[11].display_name	Computer hardware
concepts[12].id	https://openalex.org/C94375191
concepts[12].level	1
concepts[12].score	0.4420660138130188
concepts[12].wikidata	https://www.wikidata.org/wiki/Q11205
concepts[12].display_name	Arithmetic
concepts[13].id	https://openalex.org/C149635348
concepts[13].level	1
concepts[13].score	0.43209850788116455
concepts[13].wikidata	https://www.wikidata.org/wiki/Q193040
concepts[13].display_name	Embedded system
concepts[14].id	https://openalex.org/C2777892113
concepts[14].level	2
concepts[14].score	0.42658355832099915
concepts[14].wikidata	https://www.wikidata.org/wiki/Q5527005
concepts[14].display_name	Gate count
concepts[15].id	https://openalex.org/C178489894
concepts[15].level	2
concepts[15].score	0.3590160012245178
concepts[15].wikidata	https://www.wikidata.org/wiki/Q8789
concepts[15].display_name	Cryptography
concepts[16].id	https://openalex.org/C173608175
concepts[16].level	1
concepts[16].score	0.3296527862548828
concepts[16].wikidata	https://www.wikidata.org/wiki/Q232661
concepts[16].display_name	Parallel computing
concepts[17].id	https://openalex.org/C11413529
concepts[17].level	1
concepts[17].score	0.25723814964294434
concepts[17].wikidata	https://www.wikidata.org/wiki/Q8366
concepts[17].display_name	Algorithm
concepts[18].id	https://openalex.org/C33923547
concepts[18].level	0
concepts[18].score	0.19968783855438232
concepts[18].wikidata	https://www.wikidata.org/wiki/Q395
concepts[18].display_name	Mathematics
concepts[19].id	https://openalex.org/C111919701
concepts[19].level	1
concepts[19].score	0.1277366578578949
concepts[19].wikidata	https://www.wikidata.org/wiki/Q9135
concepts[19].display_name	Operating system
concepts[20].id	https://openalex.org/C199360897
concepts[20].level	1
concepts[20].score	0.09092167019844055
concepts[20].wikidata	https://www.wikidata.org/wiki/Q9143
concepts[20].display_name	Programming language
concepts[21].id	https://openalex.org/C106544461
concepts[21].level	3
concepts[21].score	0.07306033372879028
concepts[21].wikidata	https://www.wikidata.org/wiki/Q543151
concepts[21].display_name	Block cipher
concepts[22].id	https://openalex.org/C2524010
concepts[22].level	1
concepts[22].score	0.0
concepts[22].wikidata	https://www.wikidata.org/wiki/Q8087
concepts[22].display_name	Geometry
keywords[0].id	https://openalex.org/keywords/byte
keywords[0].score	0.834472119808197
keywords[0].display_name	Byte
keywords[1].id	https://openalex.org/keywords/s-box
keywords[1].score	0.8047157526016235
keywords[1].display_name	S-box
keywords[2].id	https://openalex.org/keywords/computer-science
keywords[2].score	0.6884166598320007
keywords[2].display_name	Computer science
keywords[3].id	https://openalex.org/keywords/advanced-encryption-standard
keywords[3].score	0.6831363439559937
keywords[3].display_name	Advanced Encryption Standard
keywords[4].id	https://openalex.org/keywords/field-programmable-gate-array
keywords[4].score	0.6807248592376709
keywords[4].display_name	Field-programmable gate array
keywords[5].id	https://openalex.org/keywords/encryption
keywords[5].score	0.6000943183898926
keywords[5].display_name	Encryption
keywords[6].id	https://openalex.org/keywords/substitution
keywords[6].score	0.5289725661277771
keywords[6].display_name	Substitution (logic)
keywords[7].id	https://openalex.org/keywords/gate-array
keywords[7].score	0.517859697341919
keywords[7].display_name	Gate array
keywords[8].id	https://openalex.org/keywords/side-channel-attack
keywords[8].score	0.5097886919975281
keywords[8].display_name	Side channel attack
keywords[9].id	https://openalex.org/keywords/aes-implementations
keywords[9].score	0.5014750957489014
keywords[9].display_name	AES implementations
keywords[10].id	https://openalex.org/keywords/inverse
keywords[10].score	0.47962817549705505
keywords[10].display_name	Inverse
keywords[11].id	https://openalex.org/keywords/computer-hardware
keywords[11].score	0.4733597934246063
keywords[11].display_name	Computer hardware
keywords[12].id	https://openalex.org/keywords/arithmetic
keywords[12].score	0.4420660138130188
keywords[12].display_name	Arithmetic
keywords[13].id	https://openalex.org/keywords/embedded-system
keywords[13].score	0.43209850788116455
keywords[13].display_name	Embedded system
keywords[14].id	https://openalex.org/keywords/gate-count
keywords[14].score	0.42658355832099915
keywords[14].display_name	Gate count
keywords[15].id	https://openalex.org/keywords/cryptography
keywords[15].score	0.3590160012245178
keywords[15].display_name	Cryptography
keywords[16].id	https://openalex.org/keywords/parallel-computing
keywords[16].score	0.3296527862548828
keywords[16].display_name	Parallel computing
keywords[17].id	https://openalex.org/keywords/algorithm
keywords[17].score	0.25723814964294434
keywords[17].display_name	Algorithm
keywords[18].id	https://openalex.org/keywords/mathematics
keywords[18].score	0.19968783855438232
keywords[18].display_name	Mathematics
keywords[19].id	https://openalex.org/keywords/operating-system
keywords[19].score	0.1277366578578949
keywords[19].display_name	Operating system
keywords[20].id	https://openalex.org/keywords/programming-language
keywords[20].score	0.09092167019844055
keywords[20].display_name	Programming language
keywords[21].id	https://openalex.org/keywords/block-cipher
keywords[21].score	0.07306033372879028
keywords[21].display_name	Block cipher
language	en
locations[0].id	doi:10.3233/apc210073
locations[0].is_oa	True
locations[0].source.id	https://openalex.org/S4210175178
locations[0].source.issn	0927-5452, 1879-808X
locations[0].source.type	book series
locations[0].source.is_oa	True
locations[0].source.issn_l	0927-5452
locations[0].source.is_core	True
locations[0].source.is_in_doaj	False
locations[0].source.display_name	Advances in parallel computing
locations[0].source.host_organization	https://openalex.org/P4310320990
locations[0].source.host_organization_name	Elsevier BV
locations[0].source.host_organization_lineage	https://openalex.org/P4310320990
locations[0].source.host_organization_lineage_names	Elsevier BV
locations[0].license	cc-by-nc
locations[0].pdf_url	https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073
locations[0].version	publishedVersion
locations[0].raw_type	book-chapter
locations[0].license_id	https://openalex.org/licenses/cc-by-nc
locations[0].is_accepted	True
locations[0].is_published	True
locations[0].raw_source_name	Advances in Parallel Computing
locations[0].landing_page_url	https://doi.org/10.3233/apc210073
indexed_in	crossref
authorships[0].author.id	https://openalex.org/A5112029618
authorships[0].author.orcid
authorships[0].author.display_name	R. Sornalatha
authorships[0].countries	IN
authorships[0].affiliations[0].institution_ids	https://openalex.org/I4210146606
authorships[0].affiliations[0].raw_affiliation_string	Shanmuganathan Engineering College, Pudukkottai, India
authorships[0].institutions[0].id	https://openalex.org/I4210146606
authorships[0].institutions[0].ror	https://ror.org/052frf812
authorships[0].institutions[0].type	education
authorships[0].institutions[0].lineage	https://openalex.org/I4210146606
authorships[0].institutions[0].country_code	IN
authorships[0].institutions[0].display_name	Shanmuganathan Engineering College
authorships[0].author_position	first
authorships[0].raw_author_name	R. Sornalatha
authorships[0].is_corresponding	False
authorships[0].raw_affiliation_strings	Shanmuganathan Engineering College, Pudukkottai, India
authorships[1].author.id	https://openalex.org/A5012502866
authorships[1].author.orcid	https://orcid.org/0000-0001-6616-5340
authorships[1].author.display_name	N. Janakiraman
authorships[1].affiliations[0].raw_affiliation_string	K.L.N. College of Engineering, Madurai
authorships[1].author_position	middle
authorships[1].raw_author_name	N. Janakiraman
authorships[1].is_corresponding	False
authorships[1].raw_affiliation_strings	K.L.N. College of Engineering, Madurai
authorships[2].author.id	https://openalex.org/A5034989438
authorships[2].author.orcid	https://orcid.org/0000-0002-9185-6351
authorships[2].author.display_name	Karthigha Balamurugan
authorships[2].countries	IN
authorships[2].affiliations[0].institution_ids	https://openalex.org/I4210146606
authorships[2].affiliations[0].raw_affiliation_string	Shanmuganathan Engineering College, Pudukkottai, India
authorships[2].institutions[0].id	https://openalex.org/I4210146606
authorships[2].institutions[0].ror	https://ror.org/052frf812
authorships[2].institutions[0].type	education
authorships[2].institutions[0].lineage	https://openalex.org/I4210146606
authorships[2].institutions[0].country_code	IN
authorships[2].institutions[0].display_name	Shanmuganathan Engineering College
authorships[2].author_position	middle
authorships[2].raw_author_name	K. Balamurugan
authorships[2].is_corresponding	False
authorships[2].raw_affiliation_strings	Shanmuganathan Engineering College, Pudukkottai, India
authorships[3].author.id	https://openalex.org/A5021370867
authorships[3].author.orcid	https://orcid.org/0000-0003-0514-484X
authorships[3].author.display_name	Arun Kumar Sivaraman
authorships[3].countries	IN
authorships[3].affiliations[0].institution_ids	https://openalex.org/I876193797
authorships[3].affiliations[0].raw_affiliation_string	School of CSE, VIT University, Chennai
authorships[3].institutions[0].id	https://openalex.org/I876193797
authorships[3].institutions[0].ror	https://ror.org/00qzypv28
authorships[3].institutions[0].type	education
authorships[3].institutions[0].lineage	https://openalex.org/I876193797
authorships[3].institutions[0].country_code	IN
authorships[3].institutions[0].display_name	Vellore Institute of Technology University
authorships[3].author_position	middle
authorships[3].raw_author_name	Arun Kumar Sivaraman
authorships[3].is_corresponding	False
authorships[3].raw_affiliation_strings	School of CSE, VIT University, Chennai
authorships[4].author.id	https://openalex.org/A5027031014
authorships[4].author.orcid	https://orcid.org/0000-0002-4012-6383
authorships[4].author.display_name	Rajiv Vincent
authorships[4].countries	IN
authorships[4].affiliations[0].institution_ids	https://openalex.org/I876193797
authorships[4].affiliations[0].raw_affiliation_string	School of CSE, VIT University, Chennai
authorships[4].institutions[0].id	https://openalex.org/I876193797
authorships[4].institutions[0].ror	https://ror.org/00qzypv28
authorships[4].institutions[0].type	education
authorships[4].institutions[0].lineage	https://openalex.org/I876193797
authorships[4].institutions[0].country_code	IN
authorships[4].institutions[0].display_name	Vellore Institute of Technology University
authorships[4].author_position	middle
authorships[4].raw_author_name	Rajiv Vincent
authorships[4].is_corresponding	False
authorships[4].raw_affiliation_strings	School of CSE, VIT University, Chennai
authorships[5].author.id	https://openalex.org/A5018336281
authorships[5].author.orcid	https://orcid.org/0000-0002-0730-3309
authorships[5].author.display_name	A. Muralidhar
authorships[5].countries	IN
authorships[5].affiliations[0].institution_ids	https://openalex.org/I876193797
authorships[5].affiliations[0].raw_affiliation_string	School of CSE, VIT University, Chennai
authorships[5].institutions[0].id	https://openalex.org/I876193797
authorships[5].institutions[0].ror	https://ror.org/00qzypv28
authorships[5].institutions[0].type	education
authorships[5].institutions[0].lineage	https://openalex.org/I876193797
authorships[5].institutions[0].country_code	IN
authorships[5].institutions[0].display_name	Vellore Institute of Technology University
authorships[5].author_position	last
authorships[5].raw_author_name	A. Muralidhar
authorships[5].is_corresponding	False
authorships[5].raw_affiliation_strings	School of CSE, VIT University, Chennai
has_content.pdf	True
has_content.grobid_xml	True
is_paratext	False
open_access.is_oa	True
open_access.oa_url	https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073
open_access.oa_status	diamond
open_access.any_repository_has_fulltext	False
created_date	2025-10-10T00:00:00
display_name	FPGA Implementation of Protected Compact AES S–Box Using CQCG for Embedded Applications
has_fulltext	True
is_retracted	False
updated_date	2025-11-06T03:46:38.306776
primary_topic.id	https://openalex.org/T10951
primary_topic.field.id	https://openalex.org/fields/17
primary_topic.field.display_name	Computer Science
primary_topic.score	0.9998000264167786
primary_topic.domain.id	https://openalex.org/domains/3
primary_topic.domain.display_name	Physical Sciences
primary_topic.subfield.id	https://openalex.org/subfields/1702
primary_topic.subfield.display_name	Artificial Intelligence
primary_topic.display_name	Cryptographic Implementations and Security
related_works	https://openalex.org/W3208859339, https://openalex.org/W4253256042, https://openalex.org/W2059218952, https://openalex.org/W1973614941, https://openalex.org/W2166313671, https://openalex.org/W2076891507, https://openalex.org/W2185225898, https://openalex.org/W2398445454, https://openalex.org/W2910283520, https://openalex.org/W3208472662
cited_by_count	10
counts_by_year[0].year	2023
counts_by_year[0].cited_by_count	3
counts_by_year[1].year	2022
counts_by_year[1].cited_by_count	7
locations_count	1
best_oa_location.id	doi:10.3233/apc210073
best_oa_location.is_oa	True
best_oa_location.source.id	https://openalex.org/S4210175178
best_oa_location.source.issn	0927-5452, 1879-808X
best_oa_location.source.type	book series
best_oa_location.source.is_oa	True
best_oa_location.source.issn_l	0927-5452
best_oa_location.source.is_core	True
best_oa_location.source.is_in_doaj	False
best_oa_location.source.display_name	Advances in parallel computing
best_oa_location.source.host_organization	https://openalex.org/P4310320990
best_oa_location.source.host_organization_name	Elsevier BV
best_oa_location.source.host_organization_lineage	https://openalex.org/P4310320990
best_oa_location.source.host_organization_lineage_names	Elsevier BV
best_oa_location.license	cc-by-nc
best_oa_location.pdf_url	https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073
best_oa_location.version	publishedVersion
best_oa_location.raw_type	book-chapter
best_oa_location.license_id	https://openalex.org/licenses/cc-by-nc
best_oa_location.is_accepted	True
best_oa_location.is_published	True
best_oa_location.raw_source_name	Advances in Parallel Computing
best_oa_location.landing_page_url	https://doi.org/10.3233/apc210073
primary_location.id	doi:10.3233/apc210073
primary_location.is_oa	True
primary_location.source.id	https://openalex.org/S4210175178
primary_location.source.issn	0927-5452, 1879-808X
primary_location.source.type	book series
primary_location.source.is_oa	True
primary_location.source.issn_l	0927-5452
primary_location.source.is_core	True
primary_location.source.is_in_doaj	False
primary_location.source.display_name	Advances in parallel computing
primary_location.source.host_organization	https://openalex.org/P4310320990
primary_location.source.host_organization_name	Elsevier BV
primary_location.source.host_organization_lineage	https://openalex.org/P4310320990
primary_location.source.host_organization_lineage_names	Elsevier BV
primary_location.license	cc-by-nc
primary_location.pdf_url	https://ebooks.iospress.nl/pdf/doi/10.3233/APC210073
primary_location.version	publishedVersion
primary_location.raw_type	book-chapter
primary_location.license_id	https://openalex.org/licenses/cc-by-nc
primary_location.is_accepted	True
primary_location.is_published	True
primary_location.raw_source_name	Advances in Parallel Computing
primary_location.landing_page_url	https://doi.org/10.3233/apc210073
publication_date	2021-10-04
publication_year	2021
referenced_works	https://openalex.org/W2148578019, https://openalex.org/W2105037532, https://openalex.org/W2117758617, https://openalex.org/W2127829815, https://openalex.org/W2112244944, https://openalex.org/W1789896601, https://openalex.org/W2127752881, https://openalex.org/W2099179520, https://openalex.org/W1804789305
referenced_works_count	9
abstract_inverted_index.a	67, 157
abstract_inverted_index.36	115
abstract_inverted_index.5%	105
abstract_inverted_index.78	111
abstract_inverted_index.By	87
abstract_inverted_index.In	0
abstract_inverted_index.an	5, 129
abstract_inverted_index.be	140, 154
abstract_inverted_index.by	30, 142
abstract_inverted_index.in	62, 132
abstract_inverted_index.is	28, 70, 107, 137
abstract_inverted_index.it	136
abstract_inverted_index.of	25, 33, 40, 92, 147
abstract_inverted_index.or	134
abstract_inverted_index.to	72, 104, 139, 153, 161
abstract_inverted_index.up	103
abstract_inverted_index.we	3, 58, 98, 108
abstract_inverted_index.(S)	16
abstract_inverted_index.AES	43, 95, 130
abstract_inverted_index.AND	116
abstract_inverted_index.But	57
abstract_inverted_index.The	23
abstract_inverted_index.and	18, 52, 66, 80, 114, 124
abstract_inverted_index.any	145
abstract_inverted_index.bit	159
abstract_inverted_index.box	45
abstract_inverted_index.for	36, 77, 83, 118
abstract_inverted_index.its	19, 53, 81, 125
abstract_inverted_index.one	146
abstract_inverted_index.the	31, 41, 60, 63, 74, 84, 89, 93, 100, 120, 148, 164
abstract_inverted_index.Data	152
abstract_inverted_index.Most	39
abstract_inverted_index.area	6
abstract_inverted_index.both	61, 121
abstract_inverted_index.byte	17, 51, 76, 123
abstract_inverted_index.from	163
abstract_inverted_index.gate	90, 101
abstract_inverted_index.only	110
abstract_inverted_index.same	64
abstract_inverted_index.side	149, 167
abstract_inverted_index.size	24
abstract_inverted_index.take	109
abstract_inverted_index.that	106
abstract_inverted_index.this	1, 26
abstract_inverted_index.used	35, 71
abstract_inverted_index.uses	48
abstract_inverted_index.with	156
abstract_inverted_index.(AES)	14
abstract_inverted_index.EX-OR	112
abstract_inverted_index.While	127
abstract_inverted_index.above	165
abstract_inverted_index.added	155
abstract_inverted_index.field	9
abstract_inverted_index.gates	34, 113, 117
abstract_inverted_index.logic	21
abstract_inverted_index.using	144
abstract_inverted_index.work,	2
abstract_inverted_index.design	27
abstract_inverted_index.liable	138
abstract_inverted_index.module	65
abstract_inverted_index.number	32
abstract_inverted_index.obtain	4
abstract_inverted_index.random	158
abstract_inverted_index.select	73
abstract_inverted_index.signal	69
abstract_inverted_index.S–Box	96
abstract_inverted_index.channel	150, 168
abstract_inverted_index.control	68
abstract_inverted_index.design.	22
abstract_inverted_index.hackers	143
abstract_inverted_index.inverse	20, 54, 82
abstract_inverted_index.prevent	162
abstract_inverted_index.reduced	99
abstract_inverted_index.Advanced	11
abstract_inverted_index.Standard	13
abstract_inverted_index.attacks.	151, 169
abstract_inverted_index.detected	141
abstract_inverted_index.existing	42
abstract_inverted_index.hardware	37, 46, 55
abstract_inverted_index.inverse.	126
abstract_inverted_index.previous	94
abstract_inverted_index.separate	49
abstract_inverted_index.sequence	160
abstract_inverted_index.algorithm	131
abstract_inverted_index.circuitry	133
abstract_inverted_index.comparing	88
abstract_inverted_index.composite	8
abstract_inverted_index.implement	59
abstract_inverted_index.mentioned	166
abstract_inverted_index.operation	79
abstract_inverted_index.Encryption	12
abstract_inverted_index.arithmetic	10
abstract_inverted_index.calculated	29
abstract_inverted_index.decryption	85
abstract_inverted_index.encryption	78
abstract_inverted_index.operation.	86
abstract_inverted_index.proficient	7
abstract_inverted_index.structures.	56
abstract_inverted_index.utilization	91, 102
abstract_inverted_index.Substitution	15, 44, 50, 122
abstract_inverted_index.implementing	119, 128
abstract_inverted_index.programming,	135
abstract_inverted_index.substitution	75
abstract_inverted_index.implementation	47
abstract_inverted_index.implementation,	97
abstract_inverted_index.implementation.	38
cited_by_percentile_year.max	99
cited_by_percentile_year.min	96
countries_distinct_count	1
institutions_distinct_count	6
citation_normalized_percentile.value	0.9400291
citation_normalized_percentile.is_in_top_1_percent	False
citation_normalized_percentile.is_in_top_10_percent	True