High-performance STT-MRAM Logic-in-Memory Scheme Utilizing Data Read Features Article Swipe
YOU?
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· 2022
· Open Access
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· DOI: https://doi.org/10.1145/3565478.3572322
In the Big Data era, enormous amounts of data processing have caused an intolerable 'memory wall' challenge for traditional Von Neumann architectures. Therefore, more advanced Logic-in-memory (LiM) computing architectures are proposed with integrated computing and memory units that reduce data migration. The emerging non-volatile memory STT-MRAM, with its fast access speed, near-zero leakage power consumption and high density is one of the most competitive carriers for LiM architectures. This work introduces the principle of LiM and proposes four basic logic operations (XNOR, XOR, AND and OR) based on STT-MRAM. Incorporating the reading characteristics of STT-MRAM and slight modifications to the peripheral circuitry, these operations achieve significant optimisation in terms of latency and energy consumption. From the experimental results, the proposed scheme can reduce the latency of XOR, AND and OR operations at least by 99.3%, 82.2% and 80.2% compared with the existing design. Also, 500 Monte Carlo samples prove the feasibility and robustness of the proposed scheme.
Related Topics
- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.1145/3565478.3572322
- https://dl.acm.org/doi/pdf/10.1145/3565478.3572322
- OA Status
- gold
- References
- 18
- Related Works
- 10
- OpenAlex ID
- https://openalex.org/W4378881778
Raw OpenAlex JSON
- OpenAlex ID
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https://openalex.org/W4378881778Canonical identifier for this work in OpenAlex
- DOI
-
https://doi.org/10.1145/3565478.3572322Digital Object Identifier
- Title
-
High-performance STT-MRAM Logic-in-Memory Scheme Utilizing Data Read FeaturesWork title
- Type
-
articleOpenAlex work type
- Language
-
enPrimary language
- Publication year
-
2022Year of publication
- Publication date
-
2022-12-07Full publication date if available
- Authors
-
Kai Liu, Bi Wu, Haonan Zhu, Weiqiang LiuList of authors in order
- Landing page
-
https://doi.org/10.1145/3565478.3572322Publisher landing page
- PDF URL
-
https://dl.acm.org/doi/pdf/10.1145/3565478.3572322Direct link to full text PDF
- Open access
-
YesWhether a free full text is available
- OA status
-
goldOpen access status per OpenAlex
- OA URL
-
https://dl.acm.org/doi/pdf/10.1145/3565478.3572322Direct OA link when available
- Concepts
-
Computer science, Magnetoresistive random-access memory, XNOR gate, Robustness (evolution), Parallel computing, Logic gate, Data retention, Von Neumann architecture, Power consumption, Computer hardware, Embedded system, Power (physics), Algorithm, Random access memory, Gene, NAND gate, Operating system, Chemistry, Biochemistry, Physics, Quantum mechanics, Computer securityTop concepts (fields/topics) attached by OpenAlex
- Cited by
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0Total citation count in OpenAlex
- References (count)
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18Number of works referenced by this work
- Related works (count)
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10Other works algorithmically related by OpenAlex
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