Highly Performant, Deep Neural Networks with sub-microsecond latency on FPGAs for Trigger Applications Article Swipe
Noel Nottbeck
,
C. Schmitt
,
V. Büscher
·
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1051/epjconf/202024501023
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1051/epjconf/202024501023
Artificial neural networks are becoming a standard tool for data analysis, but their potential remains yet to be widely used for hardware-level trigger applications. Nowadays, high-end FPGAs, often used in low-level hardware triggers, offer theoretically enough performance to include networks of considerable size. This makes it very promising and rewarding to optimize a neural network implementation for FPGAs in the trigger context. Here an optimized neural network implementation framework is presented, which typically reaches 90 to 100% computational efficiency, requires few extra FPGA resources for data flow and controlling, and allows latencies in the order of 10s to few 100s of nanoseconds for entire (deep) networks.
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- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.1051/epjconf/202024501023
- https://www.epj-conferences.org/articles/epjconf/pdf/2020/21/epjconf_chep2020_01023.pdf
- OA Status
- diamond
- References
- 7
- Related Works
- 10
- OpenAlex ID
- https://openalex.org/W3103321383
All OpenAlex metadata
Raw OpenAlex JSON
- OpenAlex ID
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https://openalex.org/W3103321383Canonical identifier for this work in OpenAlex
- DOI
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https://doi.org/10.1051/epjconf/202024501023Digital Object Identifier
- Title
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Highly Performant, Deep Neural Networks with sub-microsecond latency on FPGAs for Trigger ApplicationsWork title
- Type
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articleOpenAlex work type
- Language
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enPrimary language
- Publication year
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2020Year of publication
- Publication date
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2020-01-01Full publication date if available
- Authors
-
Noel Nottbeck, C. Schmitt, V. BüscherList of authors in order
- Landing page
-
https://doi.org/10.1051/epjconf/202024501023Publisher landing page
- PDF URL
-
https://www.epj-conferences.org/articles/epjconf/pdf/2020/21/epjconf_chep2020_01023.pdfDirect link to full text PDF
- Open access
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YesWhether a free full text is available
- OA status
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diamondOpen access status per OpenAlex
- OA URL
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https://www.epj-conferences.org/articles/epjconf/pdf/2020/21/epjconf_chep2020_01023.pdfDirect OA link when available
- Concepts
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Field-programmable gate array, Computer science, Artificial neural network, Latency (audio), Context (archaeology), Deep neural networks, Computer architecture, Embedded system, Computer hardware, Artificial intelligence, Telecommunications, Paleontology, BiologyTop concepts (fields/topics) attached by OpenAlex
- Cited by
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0Total citation count in OpenAlex
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7Number of works referenced by this work
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10Other works algorithmically related by OpenAlex
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| abstract_inverted_index.high-end | 25 |
| abstract_inverted_index.networks | 2, 39 |
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| cited_by_percentile_year | |
| countries_distinct_count | 1 |
| institutions_distinct_count | 3 |
| sustainable_development_goals[0].id | https://metadata.un.org/sdg/9 |
| sustainable_development_goals[0].score | 0.49000000953674316 |
| sustainable_development_goals[0].display_name | Industry, innovation and infrastructure |
| citation_normalized_percentile.value | 0.12226814 |
| citation_normalized_percentile.is_in_top_1_percent | False |
| citation_normalized_percentile.is_in_top_10_percent | False |