Journal of Integrated Circuits and Systems • Vol 11 • No 1
Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs
December 2020 • Alberto Vinícius de Oliveira, Paula Ghedini Der Agopian, João Antônio Martino, Eddy Simoen, Cor Claeys, Hans Mertens, Nadine Collaert, Aaron Thean
One of the main challenging issues for germanium (Ge) devices is the gate stack engineering which determines the interface state density (NIT) and the associated channel/oxide interface quality. This paper shows how this issue can play a role in p-channel Ge MOSFETs considering both the operation mode, i.e., comparing conventional, dynamic threshold voltage (DT, where VBS = VGS) and enhanced dynamic threshold voltage (eDT, where VBS=k*VGS) modes, and the main analog parameters like the Early voltage (VEA) and intr…