Parallel Automata Processor Article Swipe

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YOU? · · 2017 · Open Access · · DOI: https://doi.org/10.1145/3079856.3080207

Finite State Machines (FSM) are widely used computation models for many application domains. These embarrassingly sequential applications with irregular memory access patterns perform poorly on conventional von-Neumann architectures. The Micron Automata Processor (AP) is an in-situ memory-based computational architecture that accelerates non-deterministic finite automata (NFA) processing in hardware. However, each FSM on the AP is processed sequentially, limiting potential speedups.

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Computer science Parallel computing Von Neumann architecture Finite-state machine Automaton Limiting Computation Theoretical computer science Algorithm Programming language Engineering Mechanical engineering

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Type: article
Language: en
Landing Page: https://doi.org/10.1145/3079856.3080207
PDF: https://dl.acm.org/doi/pdf/10.1145/3079856.3080207?download=true
OA Status: gold
Cited By: 34
References: 38
Related Works: 10
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DOI: https://doi.org/10.1145/3079856.3080207

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Title: Parallel Automata Processor

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Type: article

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Language: en

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Publication year: 2017

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Publication date: 2017-06-24

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Authors: Arun Subramaniyan, Reetuparna Das

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Landing page: https://doi.org/10.1145/3079856.3080207

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Concepts: Computer science, Parallel computing, Von Neumann architecture, Finite-state machine, Automaton, Limiting, Computation, Theoretical computer science, Algorithm, Programming language, Engineering, Mechanical engineering

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Cited by: 34

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