Pathfinding for 2.5D interconnect technologies Article Swipe
Saptadeep Pal
,
Puneet Gupta
·
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1145/3414622.3431906
YOU?
·
· 2020
· Open Access
·
· DOI: https://doi.org/10.1145/3414622.3431906
As conventional technology scaling becomes harder, 2.5D integration provides a viable pathway to building larger systems at lower cost. Therefore recently, there has been a proliferation of multiple 2.5D integration technologies that offer different interconnect characteristics such as wiring pitch, bump/pad pitch, inter-die distance, etc. All these factors affect the interconnect metrics of bandwidth, latency and energy-per-bit which ultimately determine system performance. There are other factors such as the choice of ESD circuitry, dicing technology and signaling voltage that also influence these interconnect metrics. In this work, we propose a novel pathfinding methodology for 2.5D interconnect technologies, which seeks to identify the trade-offs among the different factors which affect the performance metrics. We show that incessant scaling of the critical dimensions of the interconnect is not very useful. We emphasize the importance of managing ESD and dicing in improving energy efficiency of these interconnects. We also show that a heterogeneous chiplet ecosystem comes with significant I/O energy penalties. Overall, we demonstrate that a holistic approach considering features of 2.5D integration technology, chiplet technology and various other factors need to be considered and optimized simultaneously to maximize the performance and cost benefits of these integration solutions.
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Metadata
- Type
- article
- Language
- en
- Landing Page
- https://doi.org/10.1145/3414622.3431906
- https://dl.acm.org/doi/pdf/10.1145/3414622.3431906
- OA Status
- gold
- Cited By
- 5
- References
- 30
- Related Works
- 10
- OpenAlex ID
- https://openalex.org/W3111562648
All OpenAlex metadata
Raw OpenAlex JSON
- OpenAlex ID
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https://openalex.org/W3111562648Canonical identifier for this work in OpenAlex
- DOI
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https://doi.org/10.1145/3414622.3431906Digital Object Identifier
- Title
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Pathfinding for 2.5D interconnect technologiesWork title
- Type
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articleOpenAlex work type
- Language
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enPrimary language
- Publication year
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2020Year of publication
- Publication date
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2020-11-05Full publication date if available
- Authors
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Saptadeep Pal, Puneet GuptaList of authors in order
- Landing page
-
https://doi.org/10.1145/3414622.3431906Publisher landing page
- PDF URL
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https://dl.acm.org/doi/pdf/10.1145/3414622.3431906Direct link to full text PDF
- Open access
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YesWhether a free full text is available
- OA status
-
goldOpen access status per OpenAlex
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https://dl.acm.org/doi/pdf/10.1145/3414622.3431906Direct OA link when available
- Concepts
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Interconnection, Computer science, Bandwidth (computing), Emerging technologies, Latency (audio), Wafer dicing, Computer architecture, Embedded system, Engineering, Telecommunications, Electrical engineering, Artificial intelligence, WaferTop concepts (fields/topics) attached by OpenAlex
- Cited by
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5Total citation count in OpenAlex
- Citations by year (recent)
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2025: 2, 2024: 1, 2023: 1, 2022: 1Per-year citation counts (last 5 years)
- References (count)
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30Number of works referenced by this work
- Related works (count)
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10Other works algorithmically related by OpenAlex
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| abstract_inverted_index.interconnects. | 143 |
| abstract_inverted_index.simultaneously | 183 |
| abstract_inverted_index.characteristics | 35 |
| cited_by_percentile_year.max | 97 |
| cited_by_percentile_year.min | 89 |
| countries_distinct_count | 1 |
| institutions_distinct_count | 2 |
| sustainable_development_goals[0].id | https://metadata.un.org/sdg/7 |
| sustainable_development_goals[0].score | 0.8899999856948853 |
| sustainable_development_goals[0].display_name | Affordable and clean energy |
| citation_normalized_percentile.value | 0.53764905 |
| citation_normalized_percentile.is_in_top_1_percent | False |
| citation_normalized_percentile.is_in_top_10_percent | False |