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Computer science Logic synthesis Scalability Logic optimization Theoretical computer science Representation (politics) Description logic Graph Logic gate Programming language Algorithm Database Politics Law Political science

Heinz Riener , Eleonora Testa , Winston Haaswijk , Alan Mishchenko , Luca Amarù , Giovanni De Micheli , Mathias Soeken ·

YOU? · · 2019 · Open Access · · DOI: https://doi.org/10.1145/3316781.3317905 · OA: W2944997892

This paper proposes a novel methodology for multi-level logic synthesis that is independent from a specific graph data-structure, but formulates synthesis procedures using an abstract concept definition of a logic representation. The idea is to capture the essence of optimisations in a general manner and tailor only small performance-critical sections to the underlying logic representation. This generic, yet scalable approach, saves many man-months of development time and enables logic synthesis and technology-mapping procedures parameterised in a logic representation. We present the generic design methodology and demonstrate its practicality by providing a complete state-of-the-art logic synthesis flow.