Strategic Mobility Engineering in 2D Semiconductor‐based FETs for Enhanced Electronic Devices Article Swipe
YOU?
·
· 2025
· Open Access
·
· DOI: https://doi.org/10.1002/advs.202509170
· OA: W4414277999
As silicon‐based electronics approach the physical limits of Moore's Law, 2‐Dimensional (2D) semiconductors emerge as promising candidates for next‐generation electronic devices due to their atomic‐scale thickness and inherently high carrier mobilities. These materials offer superior electrostatic control, mitigating short‐channel effects while enabling continued device scaling. However, challenges such as contact resistance and suboptimal channel properties continue to impede carrier transport, necessitating advanced mobility engineering strategies. This review comprehensively evaluates recent approaches to enhance carrier mobility in 2D semiconductor‐based field‐effect transistors (FETs), including doping, metal‐semiconductor interface optimization, effective mass engineering, scattering mechanism manipulation, work function tuning, and strain engineering. These strategies improve critical device parameters like current drive, subthreshold swing, and on/off ratios by optimizing carrier transport efficiency. By linking material‐level advancements to circuit‐level performance, this work underscores the pivotal role of mobility engineering in enabling scalable, high‐performance 2D electronics. These insights pave the way for transitioning 2D materials from laboratory research to practical applications, overcoming the limitations of conventional silicon technologies and driving innovations in high‐performance, energy‐efficient electronics.
