Ali Afzali‐Kusha
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View article: On the Impact of ISA Extension on Energy Consumption of I-Cache in Extensible Processors
On the Impact of ISA Extension on Energy Consumption of I-Cache in Extensible Processors Open
As is widely known, the computational speed and power consumption are two critical parameters in microprocessor design. A solution for these issues is the application specific instruction set processor (ASIP) methodology, which can improve…
View article: ReMeCo
ReMeCo Open
Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). However, the immature fabrication process of memristor…
View article: Accuracy Configurable Adders with Negligible Delay Overhead in Exact Operating Mode
Accuracy Configurable Adders with Negligible Delay Overhead in Exact Operating Mode Open
In this paper, two accuracy configurable adders capable of operating in approximate and exact modes are proposed. In the adders, which include a block-based carry propagate and a parallel prefix structure, the carry chains are cut off in t…
View article: Heterogeneous Multi-core Array-based DNN Accelerator
Heterogeneous Multi-core Array-based DNN Accelerator Open
In this article, we investigate the impact of architectural parameters of array-based DNN accelerators on accelerator's energy consumption and performance in a wide variety of network topologies. For this purpose, we have developed a tool …
View article: A2P-MANN: Adaptive Attention Inference Hops Pruned Memory-Augmented Neural Networks
A2P-MANN: Adaptive Attention Inference Hops Pruned Memory-Augmented Neural Networks Open
In this work, to limit the number of required attention inference hops in memory-augmented neural networks, we propose an online adaptive approach called A2P-MANN. By exploiting a small neural network classifier, an adequate number of atte…
View article: BRDS: An FPGA-based LSTM Accelerator with Row-Balanced Dual-Ratio Sparsification
BRDS: An FPGA-based LSTM Accelerator with Row-Balanced Dual-Ratio Sparsification Open
In this paper, first, a hardware-friendly pruning algorithm for reducing energy consumption and improving the speed of Long Short-Term Memory (LSTM) neural network accelerators is presented. Next, an FPGA-based platform for efficient execu…
View article: Space Expansion of Feature Selection for Designing more Accurate Error Predictors
Space Expansion of Feature Selection for Designing more Accurate Error Predictors Open
Approximate computing is being considered as a promising design paradigm to overcome the energy and performance challenges in computationally demanding applications. If the case where the accuracy can be configured, the quality level versu…
View article: TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip
TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip Open
Thermal stress including temperature gradients in time and space, as well as thermal cycling, influences lifetime reliability and performance of modern multiprocessor systems-on-chip (MPSoCs). Conventional power and temperature management …