Ahmed S. Emara
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View article: Design for Slew-Rate in Multi-Stage CMOS OTAs
Design for Slew-Rate in Multi-Stage CMOS OTAs Open
View article: Design for Slew-Rate in Multi-Stage CMOS OTAs
Design for Slew-Rate in Multi-Stage CMOS OTAs Open
View article: Optimized Periodic ΣΔ Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications
Optimized Periodic ΣΔ Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications Open
Settling time is an important performance metric in digital-to-analog converters (DACs) that are used for dynamic calibration applications. To obtain an area efficient DAC design, periodic sequences are generated from sigma-delta modulator…
View article: On the Production Testing of Memristor Ratioed Logic (MRL) Gates
On the Production Testing of Memristor Ratioed Logic (MRL) Gates Open
This paper focuses on the production testing of Memristor Ratioed Logic (MRL) gates. MRL is a family that uses memristors along with CMOS inverters to design logic gates. Two-input NAND and NOR gates are investigated using the stuck at fau…