Aibin Yan
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View article: Nonvolatile Double- and Triple-Node-Upset Tolerant Latch Designs Based on FeFET and CMOS
Nonvolatile Double- and Triple-Node-Upset Tolerant Latch Designs Based on FeFET and CMOS Open
International audience
View article: TUTPFL: Triple Node Upset-Tolerant and Single-Event Transient-Filtered Low-Power Latch With HSPICE and FPGA-Based Verifications
TUTPFL: Triple Node Upset-Tolerant and Single-Event Transient-Filtered Low-Power Latch With HSPICE and FPGA-Based Verifications Open
International audience
View article: A Brief Discussion on Modern Landscape Design under the Influence of Ecologism
A Brief Discussion on Modern Landscape Design under the Influence of Ecologism Open
The deterioration of the global ecological environment makes people begin to redefine the relationship between man and nature, and the idea of ecologism gradually rises. Some landscape architects realize the importance of ecological protec…
View article: TNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications
TNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications Open
International audience
View article: Design of Nonvolatile and Multinode-Upset Recoverable Latches Based on Magnetic Tunnel Junction and CMOS
Design of Nonvolatile and Multinode-Upset Recoverable Latches Based on Magnetic Tunnel Junction and CMOS Open
International audience
View article: Cost-Optimized Double-Node-Upset-Recovery Latch Designs With Aging Mitigation and Algorithm-Based Verification for Long-Term Robustness Enhancement
Cost-Optimized Double-Node-Upset-Recovery Latch Designs With Aging Mitigation and Algorithm-Based Verification for Long-Term Robustness Enhancement Open
International audience
View article: Graph-Based Multitask Transfer Learning for Fault Detection and Diagnosis of Few-Shot Analog Circuits
Graph-Based Multitask Transfer Learning for Fault Detection and Diagnosis of Few-Shot Analog Circuits Open
International audience
View article: Cost-Optimized and Highly Robust Latches Providing Complete Quadruple-Node-Upset Tolerance and Recovery With Algorithm-Based Verifications
Cost-Optimized and Highly Robust Latches Providing Complete Quadruple-Node-Upset Tolerance and Recovery With Algorithm-Based Verifications Open
International audience
View article: HALTRAV: Design of a High-Performance and Area-Efficient Latch With Triple-Node-Upset Recovery and Algorithm-Based Verifications
HALTRAV: Design of a High-Performance and Area-Efficient Latch With Triple-Node-Upset Recovery and Algorithm-Based Verifications Open
International audience
View article: Cost Efficient Flip-Flop Designs With Multiple-Node Upset-Tolerance and Algorithm-Based Verifications
Cost Efficient Flip-Flop Designs With Multiple-Node Upset-Tolerance and Algorithm-Based Verifications Open
International audience
View article: IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications
IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications Open
International audience
View article: Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices
Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices Open
International audience
View article: MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method
MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method Open
International audience
View article: FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell
FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell Open
International audience
View article: Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS
Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS Open
International audience
View article: Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications
Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications Open
International audience
View article: A Low Overhead and Double-Node-Upset Self-Recoverable Latch
A Low Overhead and Double-Node-Upset Self-Recoverable Latch Open
International audience
View article: Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness
Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness Open
International audience
View article: Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications
Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications Open
International audience
View article: Designs of Array Multipliers with an Optimized Delay in Quantum-Dot Cellular Automata
Designs of Array Multipliers with an Optimized Delay in Quantum-Dot Cellular Automata Open
Quantum-dot cellular automata (QCA) has been considered as a novel nano-electronic technology. With the advantages of low power consumption, high speed, and high integration, QCA has been treated as the potential replacement technology of …
View article: Design of Low-Cost Approximate CMOS Full Adders
Design of Low-Cost Approximate CMOS Full Adders Open
International audience
View article: A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications
A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications Open
International audience
View article: High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology
High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology Open
International audience
View article: Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata
Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata Open
International audience
View article: Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments
Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments Open
International audience