Daniel A. Jiménez YOU? Author Swipe

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A decade of on-farm data about improved cereal and legume cropping in Mexico Open

Andrea Gardeazabal, J. Cortés, Simon Fonteyne, Beatriz Burgueño Gómez, Daniel A. Jiménez , et al. · 2025

This data descriptor presents a decade-long agronomic dataset collected between 2012 and 2022 by extension agents across Mexico as part of CIMMYT's on-farm experimentation network. Extension agents used a unified digital logbook platform (…

Evaluating the Effectiveness of Parameter-Efficient Fine-Tuning in Genomic Classification Tasks Open

Daniel S. Berman, Daniel A. Jiménez, Shengjun Ta, Brian Merritt, Vijay Narayan , et al. · 2025

Foundation models are increasingly being leveraged for biological tasks. To address the high memory requirements of fine-tuning large pre-trained language models, parameter efficient fine-tuning (PEFT) methods are also being increasingly u…

Light-weight Cache Replacement for Instruction Heavy Workloads Open

Saba Mostofi, Setu Gupta, Ahmad Hassani, Krishnam Tibrewala, Elvira Teran , et al. · 2025

Exposing Shadow Branches Open

Chrysanthos Pepi, Bhargav Reddy Godala, Krishnam Tibrewala, Gino Chacon, Paul V. Gratz , et al. · 2024

Modern processors implement a decoupled front-end in the form of Fetch Directed Instruction Prefetching (FDIP) to avoid front-end stalls. FDIP is driven by the Branch Prediction Unit (BPU), relying on the BPU's accuracy and branch target t…

Correct Wrong Path Open

Bhargav Reddy Godala, S. Ramesh, Krishnam Tibrewala, Chrysanthos Pepi, Gino Chacon , et al. · 2024

Modern OOO CPUs have very deep pipelines with large branch misprediction recovery penalties. Speculatively executed instructions on the wrong path can significantly change cache state, depending on speculation levels. Architects often empl…

Practically Tackling Memory Bottlenecks of Graph-Processing Workloads Open

Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas · 2024

Graph-processing workloads have become widespread due to their relevance on a wide range of application domains such as network analysis, path- planning, bioinformatics, and machine learning. Graph-processing workloads have massive data fo…

Author Index Open

A Chhabria, Byeong‐il Ahn, Jung Min Ahn, Amro Awad, Deanna Berger , et al. · 2024

A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering Open

Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas · 2024

To alleviate the performance and energy overheads of contemporary applications with large data footprints, we propose the Two Level Perceptron (TLP) predictor, a neural mechanism that effectively combines predicting whether an access will …

Improved Converted Traces from Rebasing Microarchitectural Research with Industry Traces Open

Josué Feliu, Arthur Pérais, Daniel A. Jiménez, Alberto Ros · 2023

Improved converted traces of the paper "Rebasing Microarchitectural Research with Industry Traces", published at the 2023 IEEE International Symposium on Workload Characterization. It includes the CVP-1 traces used in the paper converted w…

Improved Converted Traces from Rebasing Microarchitectural Research with Industry Traces Open

Josué Feliu, Arthur Pérais, Daniel A. Jiménez, Alberto Ros · 2023

Improved converted traces of the paper "Rebasing Microarchitectural Research with Industry Traces", published at the 2023 IEEE International Symposium on Workload Characterization. It includes the CVP-1 traces used in the paper converted w…

Rebasing Microarchitectural Research with Industry Traces Open

Josué Feliu, Arthur Pérais, Daniel A. Jiménez, Alberto Ros · 2023

International audience

Data Artifact: Rebasing Microarchitectural Research with Industry Traces Open

Josué Feliu, Arthur Pérais, Daniel A. Jiménez, Alberto Ros · 2023

Data Artifact of the paper "Rebasing Microarchitectural Research with Industry Traces", published at the 2023 IEEE International Symposium on Workload Characterization. It includes the original CVP-1 traces used in the paper. Note: the imp…

Data Artifact: Rebasing Microarchitectural Research with Industry Traces Open

Josué Feliu, Arthur Pérais, Daniel A. Jiménez, Alberto Ros · 2023

Data Artifact of the paper "Rebasing Microarchitectural Research with Industry Traces", published at the 2023 IEEE International Symposium on Workload Characterization. It includes the original CVP-1 traces used in the paper. Note: the imp…

Buenas Prácticas de Innovación Docente en el Espacio Europeo de Educación Superior (vol. X) Open

Prácticas De, Innovación Docente, E El, Jorge Colección, Daniel A. Jiménez , et al. · 2023

La llamada a promover la innovación educativa y la calidad en el proceso de enseñanza-aprendizaje adquiere una relevancia especial en la implantación del Espacio Europeo de Educación Superior. El reto reside, sin lugar a dudas, en clarific…

Table of Contents Open

Jo�ão Fabrício Filho, Brady Testa, Daniel A. Jiménez, Arthur M. Krause, Philippe O. A. Navaux · 2022

The Championship Simulator: Architectural Simulation for Education and Competition Open

Nathan Gober, Gino Chacon, Lei Wang, Paul V. Gratz, Daniel A. Jiménez , et al. · 2022

Recent years have seen a dramatic increase in the microarchitectural complexity of processors. This increase in complexity presents a twofold challenge for the field of computer architecture. First, no individual architect can fully compre…

Page Size Aware Cache Prefetching Open

Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jiménez , et al. · 2022

The increase in working set sizes of contemporary applications outpaces the growth in cache sizes, resulting in frequent main memory accesses that deteriorate system per- formance due to the disparity between processor and memory speeds. P…

Shipping Costs and Inflation Open

Davide Furceri, Yan Carrière‐Swallow, Pragyan Deb, Daniel A. Jiménez, Jonathan D. Ostry · 2022

The Covid-19 pandemic has disrupted global supply chains, leading to shipment delays and soaring shipping costs.We study the impact of shocks to global shipping costs-measured by the Baltic Dry Index (BDI)-on domestic prices for a large pa…

Morrigan: A Composite Instruction TLB Prefetcher Open

Georgios Vavouliotis, Lluc Alvarez, Boris Grot, Daniel A. Jiménez, Marc Casas · 2021

The effort to reduce address translation overheads has typically targeted data accesses since they constitute the overwhelming portion of the second-level TLB (STLB) misses in desktop and HPC applications. The address translation cost of i…

Exploiting Page Table Locality for Agile TLB Prefetching Open

Georgios Vavouliotis, Lluc Alvarez, Vasileios Karakostas, Konstantinos Nikas, Nectarios Koziris , et al. · 2021

Frequent Translation Lookaside Buffer (TLB) misses incur high performance and energy costs due to page walks required for fetching the corresponding address translations. Prefetching page table entries (PTEs) ahead of demand TLB accesses c…

Top Picks From the 2020 Computer Architecture Conferences Open

Daniel A. Jiménez · 2021

Every year, IEEE Micro selects some of the most notable articles published in the previous year's computer architecture conferences to highlight in this Special Issue. In early 2021, the selection committee chose 12 articles to appear as “…

Steering Committee Open

Jim Ang, Thomas M. Conte, Paolo Faraboschi, Hewlett Packard Enterprise, Natesh Ganesh , et al. · 2020

Characterizing the impact of last-level cache replacement policies on big-data workloads Open

Alexandre Valentin Jamet, Lluc Alvarez, Daniel A. Jiménez, Marc Casas · 2020

The vast disparity between Last Level Cache (LLC) and memory latencies has motivated the need for efficient cache management policies. The computer architecture literature abounds with work on LLC replacement policy. Although these works g…

SB-Fetch Open

Laith M. AlBarakat, Paul V. Gratz, Daniel A. Jiménez · 2020

Shared-memory, multi-threaded applications often require programmers to insert thread synchronization primitives (i.e. locks, barriers, and condition variables) in critical sections to synchronize data access between processes. Scaling per…

Development of Ambient Intelligence Applications using Components and Aspects Open

Lidia Fuentes, Daniel A. Jiménez, Mónica Pinto · 2020

An Event Study of COVID-19 Central Bank Quantitative Easing in Advanced and Emerging Economies Open

Alessandro Rebucci, Jonathan Hartley, Daniel A. Jiménez · 2020

The impact of cache inclusion policies on cache management techniques Open

Luna Backes, Daniel A. Jiménez · 2019

Caches were designed to mitigate the large disparity between processor and memory speeds. Many last-level cache (LLC) management techniques have been designed to further improve performance. A first observation is that most techniques in t…

On the spectrum of the conjugation action for Dn Open

Jesús Juyumaya, Daniel A. Jiménez · 2018

We prove the conjeture of [2] for the dihedral group Dn, i. e. the spectrum of the natural representation associed to the action by conjugation of Dn over itself, provides all isomorphy types of projective group of Dn (see Theorem 1).

Program Committee Open

Alaa R. Alameldeen, Rajeev Balasubramonian, Bradford M. Beckmann, Pradip Bose, Niladrish Chatterjee , et al. · 2018

Machine learning for microarchitectural prediction Open

Daniel A. Jiménez · 2017

Cache replacement and branch prediction are two important microarchitectural prediction techniques for improving performance. We propose a data-driven approach to designing microarchitectural predictors. Through simulation, we collect trac…

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