Explanipedia

Performance results of the first version of the MIZAR ASIC for the PBR mission Open

Pietro Antonio Palmieri, Micol Bargelli, M. Rolo, G. Dellacasa, Andrea Di Salvo , et al. · 2025

The Multi-channel Intergrated Zone-sampling Analogue-memory based Readout (MIZAR) ASIC is a new type of front-end electronics which has been developed for the detection of the optical Cherenkov signals by Extensive Air Showers directly obs…

ASIX: Single-photon, energy resolved X-ray imaging with 50 μm hexagonal hybrid pixel Open

M. Minuti, L. Baldini, R. Beccherle, Ronaldo Bellazzini, Ashish Bisht , et al. · 2025

The Analog Spectral Imager for X-rays is a technology demonstrator of a small-pixel Hybrid Pixel Detector (HPD) designed for applications such as X-ray diffraction, synchrotron-based material science, and soft X-ray astrophysics requiring …

Upgrade of the Belle II Vertex Detector with Depleted Monolithic Active Pixel Sensors Open

D. Auguste, M. Babeluk, M. Barbero, Stéphanie Barrillon, J. Baudot , et al. · 2025

The Belle II experiment, operating at the SuperKEKB e + e - collider, is developing a new pixelated vertex detector (VTX) to handle an higher luminosity, up to 6 × 10 35 cm -2 s -1 . The VTX will feature 5–6 layers, with a material budget …

Performance Results of the first version of the MIZAR ASIC for the PBR mission Open

М. Бертаина, Pietro Antonio Palmieri, Micol Bargelli, M. Rolo, G. Dellacasa , et al. · 2025

ARCADIA fully depleted CMOS MAPS development with LFoundry 110 nm CIS Open

M. Rolo, Attilio Andreazza, G. Ambrosi, F. Alfonsi, G. Balbi , et al. · 2025

Fully depleted CMOS sensors represent a significant step forward in radiation detection, combining the advantages of monolithic active pixel sensors with the enhanced signal collection efficiency of depleted bulk materials. The ARCADIA Col…

Upgrade of the Belle II vertex detector with depleted monolithic CMOS active pixel sensors Open

R. Boudagga, D. Auguste, M. Babeluk, M. Barbero, P. Barrillon , et al. · 2025

International audience

A 28 nm CMOS front-end circuit with in-pixel flash ADC for high-rate hybrid detectors Open

L. Gaioni, A. Galliani, L. Ratti, V. Re, G. Traversi · 2025

OBELIX: A monolithic pixel sensor with triggered readout for the Belle II upgrade Open

M. Babeluk, D. Auguste, M. Barbero, P. Barrillon, J. Baudot , et al. · 2025

RD53 pixel readout integrated circuits for ATLAS and CMS HL-LHC upgrades Open

G. Alimonti, A. Andreazza, Fernando Arteche, M. Barbero, P. Barrillon , et al. · 2025

The RD53 collaboration has since 2013 developed new hybrid pixel detector chips with 50 × 50 μm 2 pixels for the HL-LHC upgrades of the ATLAS and CMS experiments at CERN. A common architecture, design and verification framework has been de…

The DMAPS upgrade of the Belle II Vertex Detector Open

G. Rizzo, D. Auguste, M. Babeluk, M. Barbero, Stéphanie Barrillon , et al. · 2024

International audience

A Time-over-Threshold asynchronous front-end in 28 nm CMOS for the readout of pixel detectors in extreme radiation environments Open

L. Gaioni, A. Galliani, L. Ratti, V. Re, G. Traversi , et al. · 2024

This work describes the design, in a 28 nm CMOS technology, of a front-end channel for the readout of pixel sensors in future particle accelerators. The channel being developed leverages the Time-Over-Threshold technique for the numerical …

The OBELIX chip for the Belle II VTX upgrade Open

M. Babeluk, D. Auguste, M. Barbero, Stéphanie Barrillon, J. Baudot , et al. · 2024

International audience

28 nm front-end channels for the readout of pixel sensors in future high-rate applications Open

L. Gaioni, A. Galliani, L. Ratti, V. Re, G. Traversi · 2024

This work is concerned with the design and the characterization of front-end channels, developed in a 28 nm CMOS technology, conceived for the readout of pixel sensors in future, high-rate applications at the next generation facilities. Tw…

Austrochip 2023 Panel Discussion Open

G. Traversi, Michael Waltl · 2023

Detectors of future High Energy Physics (HEP) experiments will require advanced pixel readout processors to be operated in environments with unprecedented levels of radiation and particle rates.The 28 nm CMOS process is the major commercia…

A synchronous comparator architecture for the design of deadtimeless front-ends in high-rate pixellated detectors Open

L. Gaioni, G. Traversi · 2023

High-rate, pixellated detectors in present and future particle tracking applications call for advanced front-end circuits enabling the efficient readout of the signals delivered by the sensor. A compact, synchronous comparator enabling the…

Development and Testing of a Miniaturized Platform for Photoplethysmography Open

G. Traversi, L. Gaioni, Davide Salvetti · 2023

This paper presents the design and characterization of a miniaturized wearable electronic system for photoplethysmography. The system is conceived with the purpose of monitoring people during their normal duties or during physical activity…

A Charge Sensitive Amplifier in a 28 nm CMOS Technology for Pixel Detectors at Future Particle Colliders Open

L. Gaioni, A. Galliani, G. Traversi · 2023

This paper is concerned with the design of a Charge Sensitive Amplifier (CSA) in a 28 nm CMOS technology. The CSA discussed in this work is conceived for High Energy Physics (HEP) experiments at next-generation colliders, where pixel detec…

Characterization and verification of the Shunt-LDO regulator and its protection circuits for serial powering of the ATLAS and CMS pixel detectors Open

J. Kampkötter, M. Karagounis, D. Koukola, F. Loddo, Stella Orfanelli , et al. · 2022

The Shunt-LDO regulator has been integrated in the ATLAS and the CMS pixel detector RD53 front-end chip to implement the serial powering scheme which both experiments have chosen as the baseline option for the HL-LHC upgrade. The performan…

Winter: A Novel Low Power Modular Platform for Wearable and IoT Applications Open

Patrick Locatelli, Asad Hussain, Andrea Pedrana, M. Pezzoli, G. Traversi , et al. · 2021

Classification of Essential Tremor and Parkinson’s Tremor Based on a Low-Power Wearable Device Open

Patrick Locatelli, Dario Alimonti, G. Traversi, V. Re · 2020

Among movement disorders, essential tremor is by far the most common, as much as eight times more prevalent than Parkinson’s disease. Although these two conditions differ in their presentation and course, clinicians do not always recognize…

RD53 analog front-end processors for the ATLAS and CMS experiments at the High-Luminosity LHC Open

L. Gaioni, M Manghisoni, V. Re, E. Riceputi, G. Traversi , et al. · 2020

This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end c…

Design and test of current-mode DACs for threshold tuning of front-end channels for the High Luminosity LHC Open

L. Gaioni, M. Manghisoni, L. Ratti, V. Re, G. Traversi · 2020

This work is concerned with the design and the characterization of digital-to-analog current converters, developed in a 65 nm CMOS technology, conceived for threshold tuning of front-end channels at the High-Luminosity LHC experiment upgra…

Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades Open

Jeremias Kampkoetter, M. Karagounis, A. Stiller, G. Traversi, Alvaro Pradas Luengo , et al. · 2020

Serial powering is the baseline option for the pixel detectors in both the ATLAS and the CMS experiments targeting the phase II HL-LHC upgrade. The Shunt-LDO regulator is integrated in the front-end chips to generate the required supply vo…

RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades Open

Ennio Monteil, M. Barbero, D. Fougeron, S. Godiot, M. Ménouni , et al. · 2019

The Phase 2 upgrades of silicon pixel detectors at HL-LHC experiments feature extreme require- ments, such as: 50x50 μm pixels, high rate (3 GHz/cm2), unprecedented radiation levels (1 Grad), high readout speed and serial powering. As a co…

Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End Open

M. Sonzogni, F. De Canio, L. Gaioni, M. Manghisoni, V. Re , et al. · 2019

This work discusses four different algorithms for the minimization of threshold dispersion inmultichannel readout circuits for pixel detectors. These algorithms, which are based on differentmethods (e.g. charge scans, threshold scans, etc)…

Signal and Noise Performance of a 110-nm CMOS Technology for Photon Science Applications Open

G. Traversi, R. Dinapoli, M. Manghisoni, A. Mozzanica, E. Riceputi · 2019

This paper presents a study of the noise behavior of MOSFET devices belonging to a 110-nm CMOS technology in view of applications to the design of low-noise, low-power analog circuits in X-ray detection at free electron lasers (FELs) and t…

Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC Open

L. Gaioni, M. Barbero, D. Fougeron, S. Godiot, M. Ménouni , et al. · 2018

First test results of the CHIPIX65 asynchronous front-end connected to a 3D sensor Open

L. Gaioni, F. De Canio, M. Manghisoni, L. Ratti, V. Re , et al. · 2018

Phase-II Associative Memory ASIC Specifications Open

A. Stabile, F. De Canio, A. Annovi, L. Frontini, G. Fedi , et al. · 2018

This documents defines the specifications for the Associative Memory ASIC for Phase-II. The work-flow toward the final ASIC is organized in the following three steps • AM08 prototype: small area MPW prototype to test all the full custom fe…

Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications Open

F. De Canio, L. Gaioni, M. Manghisoni, L. Ratti, V. Re , et al. · 2018

This work is concerned with the design and characterization of an SLVS transmitter/receiver pair,to be used for I/O links in High Energy Physics applications. Core transistors with a powersupply of 1.2 V have been considered in the design …

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