Geunyong Bak
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View article: DDR4 BER Degradation Due to Crack in FBGA Package Solder Ball
DDR4 BER Degradation Due to Crack in FBGA Package Solder Ball Open
This paper measures bit error rate degradation in DDR4 due to crack in fine pitch ball grid array (FBGA) package solder ball. Thermal coefficient mismatch between the package and printed circuit board material causes cracks to occur in sol…
View article: Exploitations of Multiple Rows Hammering and Retention Time Interactions in DRAM Using X-Ray Radiation
Exploitations of Multiple Rows Hammering and Retention Time Interactions in DRAM Using X-Ray Radiation Open
The methodological approach of hammering multiple rows is newly proposed to evaluate today’s SDRAMs, employed with in-DRAM mitigation circuits. The multiple rows are selected based on the one-row hammering test (single row hammering withou…
View article: DDR4 Data Channel Failure Due to DC Offset Caused by Intermittent Solder Ball Fracture in FBGA Package
DDR4 Data Channel Failure Due to DC Offset Caused by Intermittent Solder Ball Fracture in FBGA Package Open
This paper shows that an intermittent AC coupling defect occurring in a DDR4 data channel will cause more intermittent errors in DDR4, compared to such defect in DDR3. The intermittent AC coupling defect occurs due to intermittent fracture…
View article: Failure signature analysis of power-opens in DDR3 SDRAMs
Failure signature analysis of power-opens in DDR3 SDRAMs Open