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View article: REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators Open
As the Internet of Things (IoTs) increasingly combines AI technology, it is a trend to deploy neural network algorithms at edges and make IoT devices more intelligent than ever. Moreover, energy-harvesting technology-based IoT devices have…
View article: Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems
Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems Open
Convolutional Neural Networks (CNNs) have significantly impacted embedded system applications across various domains. However, this exacerbates the real-time processing and hardware resource-constrained challenges of embedded systems. To t…
View article: Sign Language Gesture Recognition and Classification Based on Event Camera with Spiking Neural Networks
Sign Language Gesture Recognition and Classification Based on Event Camera with Spiking Neural Networks Open
Sign language recognition has been utilized in human–machine interactions, improving the lives of people with speech impairments or who rely on nonverbal instructions. Thanks to its higher temporal resolution, less visual redundancy inform…
View article: Efficient and Optimized Methods for Alleviating the Impacts of IR-Drop and Fault in RRAM Based Neural Computing Systems
Efficient and Optimized Methods for Alleviating the Impacts of IR-Drop and Fault in RRAM Based Neural Computing Systems Open
Resistive switching random access memory (RRAM) shows its potential to be a promising candidate as the basic in-memory computing unit for deep neural networks (DNN) accelerator design due to its non-volatile, low power, and small footprint…
View article: State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers
State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers Open
Multilevel Cell Spin-Transfer Torque Random Access Memory (MLC STT-RAM) is a promising nonvolatile memory technology to build registers for its natural immunity to electromagnetic radiation in rad-hard space environment. Unlike traditional…
View article: Expected Completion Time Aware Message Scheduling for UM-BUS Interconnected System
Expected Completion Time Aware Message Scheduling for UM-BUS Interconnected System Open
Predictable message transmission is the primary requirement in networked safety critical embedded systems design. In these systems, delay jitter has been proven to be a critical factor that must be considered. For periodic messages, minimi…
View article: FuMicro: A Fused Microarchitecture Design Integrating In-Order Superscalar and VLIW
FuMicro: A Fused Microarchitecture Design Integrating In-Order Superscalar and VLIW Open
This paper proposes FuMicro, a fused microarchitecture integrating both in-order superscalar and Very Long Instruction Word (VLIW) in a single core. A processor with FuMicro microarchitecture can work under alternative in-order superscalar…
View article: A Novel Time Synchronization Method for Dynamic Reconfigurable Bus
A Novel Time Synchronization Method for Dynamic Reconfigurable Bus Open
UM-BUS is a novel dynamically reconfigurable high-speed serial bus for embedded systems. It can achieve fault tolerance by detecting the channel status in real time and reconfigure dynamically at run-time. The bus supports direct interconn…