M. Pown
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Design of Universal Logic Gates Using Homo and Hetero-Junction Double Gate TFETs with Pseudo-Derived Logic Open
This work explores homo and hetero-junction Tunnel field-effect transistor (TFET) based NAND and NOR logic circuits using 30 nm technology and compares their performance in terms of power consumption and propagation delay. By implementing …
Investigation of Radiation Hardened TFET SRAM Cell for Mitigation of Single Event Upset Open
This study analyzes the soft error sensitivity of SRAM cell which employs double-gate tunnel field effect transistor (DG TFET). The mitigation technique for the data recovery after the heavy ion strike is discussed. The conventional 6T TFE…
Tunnel Field Effect Transistors for Digital and Analog Applications: A Review Open
Objectives: This paper presents the review of Tunnel FET (TFET) to overcome the major challenges faced by the conventional MOSFET. Analysis: Various device structures and characteristics of TFET along with different material and doping to …
Investigation of <i>f</i> <sub>t</sub> and <i>f</i> <sub>max</sub> in Si and Si <sub> 1– <i>x</i> </sub> Ge <i> <sub>x</sub> </i> based single and dual material double-gate Tunnel FETs for RF applications Open
This study optimizes Si1−xGex based double gate tunnel field effect transistor (TFET) for their high ON current (Ion) and lesser sub-threshold swing and compares Si and Si1−xGex based single material double gate (SMDG) and dual material do…