Mark Horowitz
YOU?
Author Swipe
View article: A Probabilistic Perspective on Tiling Sparse Tensor Algebra
A Probabilistic Perspective on Tiling Sparse Tensor Algebra Open
View article: Deconstruction of a spino-brain-spinal cord circuit drives chronic mechanical pain
Deconstruction of a spino-brain-spinal cord circuit drives chronic mechanical pain Open
View article: Comparison of four commercial methods for the determination of linezolid susceptibility in Gram-positive cocci and practical algorithm proposal
Comparison of four commercial methods for the determination of linezolid susceptibility in Gram-positive cocci and practical algorithm proposal Open
Introduction: Antimicrobial resistance represents a growing global concern, with methicillin-resistant Staphylococcus aureus and vancomycin-resistant enterococci representing major contributors. Linezolid (LNZ) is one of the few available …
View article: Online, Interactive Tool for Studying How Students Troubleshoot Circuits
Online, Interactive Tool for Studying How Students Troubleshoot Circuits Open
We have developed a new tool to look at how students interact with circuits during the troubleshooting process. The online tool was originally designed to analyze individual troubleshooting strategy for large classes, but it also works wel…
View article: The CARE methodology: A new lens for introductory ECE course assessment based on student challenging and rewarding experiences
The CARE methodology: A new lens for introductory ECE course assessment based on student challenging and rewarding experiences Open
Introductory Electrical and Computer Engineering (ECE) education is of great importance to students interested in exploring the field, as it introduces them to the fundamental conceptual understanding of the governing laws and theories of …
View article: Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays Open
Domain-specific accelerators are used in various computing systems ranging from edge devices to data centers. Coarse-grained reconfigurable arrays (CGRAs) represent an architectural midpoint between the flexibility of an FPGA and the effic…
View article: Associations between Plasma Lipid Mediators and Chronic Daily Headache Outcomes in Patients Randomized to a Low Linoleic Acid Diet with or without Added Omega-3 Fatty Acids
Associations between Plasma Lipid Mediators and Chronic Daily Headache Outcomes in Patients Randomized to a Low Linoleic Acid Diet with or without Added Omega-3 Fatty Acids Open
A previous report showed that 12-week lowering of dietary omega-6 linoleic acid (LA) coupled with increased omega-3 polyunsaturated fatty acid (PUFA) intake (H3-L6 diet) reduced headache frequency and improved quality of life in patients w…
View article: Vision Transformer Computation and Resilience for Dynamic Inference
Vision Transformer Computation and Resilience for Dynamic Inference Open
State-of-the-art deep learning models for computer vision tasks are based on the transformer architecture and often deployed in real-time applications. In this scenario, the resources available for every inference can vary, so it is useful…
View article: Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays Open
The architecture of a coarse-grained reconfigurable array (CGRA) interconnect has a significant effect on not only the flexibility of the resulting accelerator, but also its power, performance, and area. Design decisions that have complex …
View article: Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators Open
Image processing and machine learning applications benefit tremendously from hardware acceleration. Existing compilers target either FPGAs, which sacrifice power and performance for programmability, or ASICs, which become obsolete as appli…
View article: Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays
Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays Open
While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising programmable accelerator architectures, pipelining applications running on CGRAs is required to ensure high maximum clock frequencies. Current CGRA compilers eith…
View article: Fast Large-Integer Extended GCD Algorithm and Hardware Design for Verifiable Delay Functions and Modular Inversion
Fast Large-Integer Extended GCD Algorithm and Hardware Design for Verifiable Delay Functions and Modular Inversion Open
The extended GCD (XGCD) calculation, which computes Bézout coefficients ba, bb such that ba ∗ a0 + bb ∗ b0 = GCD(a0, b0), is a critical operation in many cryptographic applications. In particular, large-integer XGCD is computationally domi…
View article: The Sparse Abstract Machine
The Sparse Abstract Machine Open
We propose the Sparse Abstract Machine (SAM), an abstract machine model for targeting sparse tensor algebra to reconfigurable and fixed-function spatial dataflow accelerators. SAM defines a streaming dataflow abstraction with sparse primit…
View article: Effect of Dietary Fatty Acids on Sleep and Stress Among Adults With Migraine: Secondary Analysis of a Randomized Controlled Trial
Effect of Dietary Fatty Acids on Sleep and Stress Among Adults With Migraine: Secondary Analysis of a Randomized Controlled Trial Open
View article: Higher Education's Influence on Social Networks and Entrepreneurship in Brazil
Higher Education's Influence on Social Networks and Entrepreneurship in Brazil Open
Developing and middle-income countries increasingly emphasize higher education and entrepreneurship in their long-term development strategy. Thus, our work focuses on the influence of higher education institutions (HEIs) on startup ecosyst…
View article: Bringing Source-Level Debugging Frameworks to Hardware Generators
Bringing Source-Level Debugging Frameworks to Hardware Generators Open
High-level hardware generators have significantly increased the productivity of design engineers. They use software engineering constructs to reduce the repetition required to express complex designs and enable more composability. However,…
View article: Enabling Reusable Physical Design Flows with Modular Flow Generators
Enabling Reusable Physical Design Flows with Modular Flow Generators Open
Achieving high code reuse in physical design flows is challenging but increasingly necessary to build complex systems. Unfortunately, existing approaches based on parameterized Tcl generators support very limited reuse and struggle to pres…
View article: Automating System Configuration
Automating System Configuration Open
The increasing complexity of modern configurable systems makes it critical to improve the level of automation in the process of system configuration. Such automation can also improve the agility of the development cycle, allowing for rapid…
View article: An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs
An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs Open
This article presents an open-source framework for emulating mixed-signal chip designs on a field-programmable gate array (FPGA). It includes a Python-based synthesizable model generator for mixed-signal blocks (msdsl), a fixed-point and f…
View article: Compiling Halide Programs to Push-Memory Accelerators
Compiling Halide Programs to Push-Memory Accelerators Open
Image processing and machine learning applications benefit tremendously from hardware acceleration, but existing compilers target either FPGAs, which sacrifice power and performance for flexible hardware, or ASICs, which rapidly become obs…
View article: Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis
Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis Open
The architecture of a coarse-grained reconfigurable array (CGRA) processing element (PE) has a significant effect on the performance and energy efficiency of an application running on the CGRA. This paper presents an automated approach for…
View article: In Memory of Paul Penfield Jr. (1933–2021) [people]
In Memory of Paul Penfield Jr. (1933–2021) [people] Open
View article: Fast Validation of Mixed-Signal SoCs
Fast Validation of Mixed-Signal SoCs Open
Today’s mixed-signal SoCs are challenging to validate. Running enough test vectors often requires the use of event-driven simulation and hardware emulation, which in turn necessitates the creation of analog behavioral models. This paper re…
View article: fault: A Python Embedded Domain-Specific Language For Metaprogramming\n Portable Hardware Verification Components
fault: A Python Embedded Domain-Specific Language For Metaprogramming\n Portable Hardware Verification Components Open
While hardware generators have drastically improved design productivity, they\nhave introduced new challenges for the task of verification. To effectively\ncover the functionality of a sophisticated generator, verification engineers\nrequi…
View article: Interstellar
Interstellar Open
We show that DNN accelerator micro-architectures and their program mappings represent specific choices of loop order and hardware parallelism for computing the seven nested loops of DNNs, which enables us to create a formal taxonomy of all…
View article: fault: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components
fault: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components Open
View article: Aceleração de Assinaturas Baseadas em Atributos para Internet das Coisas
Aceleração de Assinaturas Baseadas em Atributos para Internet das Coisas Open
Antes de integrar dispositivos com restrições de recursos computacionais em domínios de IoT, deve-se garantir que possuam ferramental criptográfico suficiente para estabelecer mecanismos de segurança essenciais. Neste contexto, as Assinatura…
View article: StartupBR: Higher Education's Influence on Social Networks and Entrepreneurship in Brazil
StartupBR: Higher Education's Influence on Social Networks and Entrepreneurship in Brazil Open
Developing and middle-income countries increasingly empha-size higher education and entrepreneurship in their long-term develop-ment strategy. Our work focuses on the influence of higher education institutions (HEIs) on startup ecosystems …
View article: Dataset Culling: Towards Efficient Training Of Distillation-Based Domain Specific Models
Dataset Culling: Towards Efficient Training Of Distillation-Based Domain Specific Models Open
Real-time CNN-based object detection models for applications like surveillance can achieve high accuracy but are computationally expensive. Recent works have shown 10 to 100x reduction in computation cost for inference by using domain-spec…
View article: Mapping Histological Slice Sequences to the Allen Mouse Brain Atlas Without 3D Reconstruction
Mapping Histological Slice Sequences to the Allen Mouse Brain Atlas Without 3D Reconstruction Open
Histological brain slices are widely used in neuroscience to study the anatomical organization of neural circuits. Systematic and accurate comparisons of anatomical data from multiple brains, especially from different studies, can benefit …