Explanipedia

Green Change: Empowering Barangay 14 to Lead Sustainable Waste Reduction and Recycling through Environmental Education Open

Aquino, Castillon, Erroba, Obeña, Suliano , et al. · 2025

This study explores the role of environmental education programs in promoting sustainable waste reduction and recycling behaviors in Barangay 14, San Nicolas, Ilocos Norte. The research examines how various educational strategies—such as c…

RigoChat 2: an adapted language model to Spanish using a bounded dataset and reduced hardware Open

Graciela Gómez, Guillem García Subies, Pablo Ruiz-Ramírez, Mateo Valero, Natàlia Fuertes , et al. · 2025

Large Language Models (LLMs) have become a key element of modern artificial intelligence, demonstrating the ability to address a wide range of language processing tasks at unprecedented levels of accuracy without the need of collecting pro…

QUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms Open

Julián Pavón, Ivan Vargas Valdivieso, Carlos Rojas, César Hernández, Mehmet Aslan , et al. · 2024

Genome sequence analysis is fundamental to medical breakthroughs such as developing vaccines, enabling genome editing, and facilitating personalized medicine. The exponentially expanding sequencing datasets and complexity of sequencing alg…

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology Open

Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra , et al. · 2023

This paper describes the Sargantana System on chip (SoC), a 64-bit RISC-V single core processor designed by a number of academic institutions and manufactured in 22 nm FDSOI technology: BSC, UPC, UB, UAB, CIC-IPN and IMB-CNM (CSIC). The So…

Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications Open

Francesco Minervini, Oscar Palomar, Osman Ünsal, Enrico Reggiani, Josue V. Quiroga , et al. · 2022

The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized hardware in processor cores for the High Pe…

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology Open

Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez , et al. · 2022

This paper describes the design, verification, implementation and fabrication of the Drac Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The…

La cultura del esfuerzo Open

Mateo Valero · 2021

La cultura del esfuerzo del profesor Mateo Valero Cortés es título del libro número cinco de la colección Mestres publicado por la Universitat Politècnica de Catalunya. Esta colección tiene por objetivo ofrecer a los lectores una lección m…

The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for Scientific Computing, Geo Physics, Complex Mathematics, and Information Processing Open

Veljko Milutinović, Erfan Sadeqi Azer, Kristy Yoshimoto, Gerhard Klimeck, Miljan Djordjevic , et al. · 2021

This article starts from the assumption that near future 100BTransistor SuperComputers-on-a-Chip will include N big multi-core processors, 1000N small many-core processors, a TPU-like fixed-structure systolic array accelerator for the most…

When Sally Met Harry or When AI Met HPC Open

Ulises Cortés, Ulises Moya, Mateo Valero · 2021

VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations Open

Julián Pavón, Ivan Vargas Valdivieso, Adrián Barredo, Joan Marimon, Miquel Moretó , et al. · 2021

Sparsematrix operations are critical kernels inmultiple \napplication domains such as High Performance Computing, artificial \nintelligence and big data. Vector processing is widely used to \nimprove performance on mathematical kernels wit…

PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy Open

Vladimir Dimić, Miquel Moretó, Marc Casas, Mateo Valero · 2021

An Academic RISC-V Silicon Implementation Based on Open-Source Components Open

Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal , et al. · 2020

©2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creat…

Runtime-Guided ECC Protection using Online Estimation of Memory Vulnerability Open

Luc Jaulmes, Miquel Moretó, Mateo Valero, Mattan Erez, Marc Casas · 2020

Diminishing reliability of semiconductor technologies and decreasing power budgets per component hinder designing next-generation high performance computing (HPC) systems. Both constraints strongly impact memory subsystems, as DRAM main me…

The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for\n Scientific Computing, Geo Physics, Complex Mathematics, and Information\n Processing Open

Veljko Milutinović, Erfan Sadeqi Azer, Kristy Yoshimoto, Gerhard Klimeck, Miljan Djordjevic , et al. · 2020

This article starts from the assumption that near future 100BTransistor\nSuperComputers-on-a-Chip will include N big multi-core processors, 1000N small\nmany-core processors, a TPU-like fixed-structure systolic array accelerator for\nthe m…

The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chips. Open

Veljko Milutinović, Miloš Kotlar, Ivan Ratković, Nenad Korolija, Miljan Djordjevic , et al. · 2020

This article starts from the assumption that near future 100BTransistor SuperComputers-on-a-Chip will include N big multi-core processors, 1000N small many-core processors, a TPU-like fixed-structure systolic array accelerator for the most…

RICH Open

Vladimir Dimić, Miquel Moretó, Marc Casas, Jan Ciesko, Mateo Valero · 2020

Reductions constitute a frequent algorithmic pattern in high-performance and scientific computing. Sophisticated techniques are needed to ensure their correct and scalable concurrent execution on modern processors. Reductions on large arra…

Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86 Open

Juan M. Cebrián, Adrián Barredo, Helena Caminal, Miquel Moretó, Marc Casas , et al. · 2020

Improving Predication Efficiency through Compaction/Restoration of SIMD Instructions Open

Adrián Barredo, Juan M. Cebrián, Miquel Moretó, Marc Casas, Mateo Valero · 2020

Vector processors offer a wide range of unexplored opportunities to improve performance and energy efficiency. However, despite its potential, vector code generation and execution have significant challenges, the most relevant ones being c…

POSTER: An Optimized Predication Execution for SIMD Extensions Open

Adrián Barredo, Juan M. Cebrián, Miquel Moretó, Marc Casas, Mateo Valero · 2019

Vector processing is a widely used technique to improve performance and energy efficiency in modern processors. Most of them rely on predication to support divergence control. However, performance and energy consumption in predicated instr…

A Vulnerability Factor for ECC-protected Memory Open

Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas · 2019

Fault injection studies and vulnerability analyses have been used to estimate the reliability of data structures in memory. We survey these metrics and look at their adequacy to describe the data stored in ECC-protected memory. We also int…

Power efficient job scheduling by predicting the impact of processor manufacturing variability Open

Dimitrios Chasapis, Miquel Moretó, Martin Schulz, Barry Rountree, Mateo Valero , et al. · 2019

Modern CPUs suffer from performance and power consumption variability due to the manufacturing process. As a result, systems that do not consider such variability caused by manufacturing issues lead to performance degradations and wasted p…

Optimizing computation-communication overlap in asynchronous task-based programs Open

Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz , et al. · 2019

Asynchronous task-based programming models are gaining popularity to address the programmability and performance challenges in high performance computing. One of the main attractions of these models and runtimes is their potential to autom…

Using Arm’s scalable vector extension on stencil codes Open

Adrià Armejach, Helena Caminal, Juan M. Cebrián, Rubén Langarita, R. Gonzalez-Alberquilla , et al. · 2019

Data-level parallelism is frequently ignored or underutilized. Achieved through vector/SIMD capabilities, it can provide substantial performance improvements on top of widely used techniques such as thread-level parallelism. However, manua…

Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies Open

Adrián Barredo, Juan M. Cebrián, Mateo Valero, Marc Casas, Miquel Moretó · 2019

The international race towards Exascale in Europe Open

Fabrizio Gagliardi, Miquel Moretó, Mauro Olivieri, Mateo Valero · 2019

A Hardware Runtime for Task-Based Programming Models Open

Xubin Tan, Jaume Bosch, Carlos Álvarez, Daniel Jiménez-González, Eduard Ayguadé , et al. · 2019

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,crea…

Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications Open

Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara , et al. · 2019

Optimizing computation-communication overlap in asynchronous task-based programs Open

Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz , et al. · 2019

Asynchronous task-based programming models are gaining popularity to address programmability and performance challenges in high performance computing. One of the main attractions of these models and runtimes is their potential to automatic…

On the maturity of parallel applications for asymmetric multi-core processors Open

Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badía , et al. · 2019

Advances in the Hierarchical Emergent Behaviors (HEB) Approach to Autonomous Vehicles Open

Damián Roca, Rodolfo Milito, Mario Nemirovsky, Mateo Valero · 2018

Widespread deployment of autonomous vehicles (AVs) presents formidable challenges in terms on handling scalability and complexity, particularly regarding vehicular reaction in the face of unforeseen corner cases. Hierarchical Emergent Beha…

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