Michael Wirthlin
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View article: Hardness by design technique for field programmable gate arrays.
Hardness by design technique for field programmable gate arrays. Open
FPGAs are an attractive alternative for many space-based computing operations. While radiation hardened FPGAs are available, SRAM-based FPGAs are susceptible to Single-Event Upsets (SEUs). Several FPGA design hardening techniques are inves…
View article: Validation of an FPGA fault simulator.
Validation of an FPGA fault simulator. Open
This work describes the radiation testing of a fault simulation tool used to study the behavior of FPGA circuits in the presence of configuration memory upsets . There is increasing interest in the use of Field Programmable Gate Arrays (FP…
View article: Evaluation of power costs in applying TMR to FPGA designs.
Evaluation of power costs in applying TMR to FPGA designs. Open
Triple modular redundancy (TMR) is a technique commonly used to mitigate against design failures caused by single event upsets (SEUs). The SEU immunity that TMR provides comes at the cost of increased design area and decreased speed. Addit…
View article: The Cibola flight experiment
The Cibola flight experiment Open
The Cibola Flight Experiment (CFE) is an experimental small satellite carrying a reconfigurable processing instrument developed at the Los Alamos National Laboratory that demonstrates the feasibility of using FPGA-based high-performance co…
View article: Netlist Analysis and Transformations Using SpyDrNet
Netlist Analysis and Transformations Using SpyDrNet Open
Digital hardware circuits (i.e., for application specific integrated circuits or field programmable gate array circuits) can contain a large number of discrete components and connections. These connections are defined by a data structure c…
View article: Impact of Soft Errors on Large-Scale FPGA Cloud Computing
Impact of Soft Errors on Large-Scale FPGA Cloud Computing Open
FPGAs are being used in large numbers within cloud computing to provide high-performance, low-power alternatives to more traditional computing structures. While FPGAs provide a number of important benefits to cloud computing environments, …
View article: Improving SRAM FPGA Radiation Reliability Through Low-Level TMR Implementation
Improving SRAM FPGA Radiation Reliability Through Low-Level TMR Implementation Open
Mitigation techniques, such as TMR with repair, are used to reduce the negative effects of radiation on FPGAs deployed in space environments. While these techniques increase the robustness of the device, there is still room for improvement…
View article: Terrestrial Cosmic Ray Induced Soft Errors and Large-Scale FPGA Systems in the Cloud
Terrestrial Cosmic Ray Induced Soft Errors and Large-Scale FPGA Systems in the Cloud Open
Radiation from outer space can cause soft errors in microelectronic devices deployed at terrestrial altitudes on Earth. Cosmic rays entering the Earth’s atmosphere create a complex cascade of radioactive particles. The most likely form of …
View article: Single-Event Characterization of 16 nm FinFET Xilinx UltraScale+ Devices with Heavy Ion and Neutron Irradiation
Single-Event Characterization of 16 nm FinFET Xilinx UltraScale+ Devices with Heavy Ion and Neutron Irradiation Open
This study examines the single-event response of Xilinx 16nm FinFET UltraScale+ FPGA and MPSoC device families. Heavy-ion single-event latch-up, single-event upsets in configuration SRAM, BlockRAM™ memories, and flip-flops, and neutron-ind…
View article: An Analysis of High-Current Events Observed on Xilinx 7-Series and Ultrascale Field-Programmable Gate Arrays
An Analysis of High-Current Events Observed on Xilinx 7-Series and Ultrascale Field-Programmable Gate Arrays Open
This study examined high-current events observed in Xilinx Field-Programmable Gate Arrays irradiated with heavy ions. A probable cause and proposed changes to the test methodology to prevent these high-current events is described.