P. Chalmet
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Low power, high resolution MAPS for particle tracking and imaging Open
We describe here the first monolithic pixel detector prototype embedding the OrthoPix architecture, specifically designed to deal with imaging applications where the relevant number of pixel hit per frame (occupancy) is small (on the order…
View article: MAPS development for the ALICE ITS upgrade
MAPS development for the ALICE ITS upgrade Open
Monolithic Active Pixel Sensors (MAPS) offer the possibility to build pixel detectors and tracking layers with high spatial resolution and low material budget in commercial CMOS processes. Significant progress has been made in the field of…
View article: Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system
Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system Open
Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capab…
Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade Open
Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~0.3%X0~0.3%X0 in total for each inner layer) a…
Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system Open
ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full…
Recent developments of a monolithic silicon pixel detector on moderate resistivity substrates Open
This paper is focused on the recent submission of a novel monolithic pixel detector developed in standard 90nm CMOS deep sub-micron technology on wafers with moderate resistivity. This option, offered by some silicon foundries, \nallows to…