Rubén Langarita
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View article: Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology Open
This paper describes the Sargantana System on chip (SoC), a 64-bit RISC-V single core processor designed by a number of academic institutions and manufactured in 22 nm FDSOI technology: BSC, UPC, UB, UAB, CIC-IPN and IMB-CNM (CSIC). The So…
View article: Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor
Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor Open
Sequence alignment pipelines for human genomes are an emerging workload that will dominate in the precision medicine field. BWA-MEM2 is a tool widely used in the scientific community to perform read mapping studies. In this paper, we port …
View article: DVINO: A RISC-V Vector Processor Implemented in 65nm Technology
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology Open
This paper describes the design, verification, implementation and fabrication of the Drac Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The…
View article: An Academic RISC-V Silicon Implementation Based on Open-Source Components
An Academic RISC-V Silicon Implementation Based on Open-Source Components Open
©2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creat…
View article: Compressed Sparse FM-Index: Fast Sequence Alignment Using Large K-Steps
Compressed Sparse FM-Index: Fast Sequence Alignment Using Large K-Steps Open
The FM-index is a data structure used in genomics for exact search of input sequences over large reference genomes. Algorithms based on the FM-index show an irregular memory access pattern, resulting in a memory bound problem. We analyze a…
View article: Using Arm’s scalable vector extension on stencil codes
Using Arm’s scalable vector extension on stencil codes Open
Data-level parallelism is frequently ignored or underutilized. Achieved through vector/SIMD capabilities, it can provide substantial performance improvements on top of widely used techniques such as thread-level parallelism. However, manua…