Sandip Kundu
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View article: On Relative importance of C-H‧‧‧O, C-H‧‧‧π and S‧‧‧π interactions in the crystal of 2H-1-benzopyran-2-one phenyl sulfoxide - A coumarin derivative
On Relative importance of C-H‧‧‧O, C-H‧‧‧π and S‧‧‧π interactions in the crystal of 2H-1-benzopyran-2-one phenyl sulfoxide - A coumarin derivative Open
Weak intermolecular interactions play crucial role in molecular assembly and crystal packing. Though C-H‧‧‧O, C-H‧‧‧π interactions have received much attention, the S‧‧‧π interactions have received little attention. Present paper explores …
View article: Security Risks Due to Data Persistence in Cloud FPGA Platforms
Security Risks Due to Data Persistence in Cloud FPGA Platforms Open
The integration of Field Programmable Gate Arrays (FPGAs) into cloud computing systems has become commonplace. As the operating systems used to manage these systems evolve, special consideration must be given to DRAM devices accessible by …
View article: Optical Micromanipulation of Soft Materials: Applications in Devices and Technologies
Optical Micromanipulation of Soft Materials: Applications in Devices and Technologies Open
Since its invention by Arthur Ashkin and colleagues at Bell Labs in the 1970s, optical micromanipulation, also known as optical tweezers or laser tweezers, has evolved remarkably to become one of the most convenient and versatile tools for…
View article: Memory Scraping Attack on Xilinx FPGAs: Private Data Extraction from Terminated Processes
Memory Scraping Attack on Xilinx FPGAs: Private Data Extraction from Terminated Processes Open
FPGA-based hardware accelerators are becoming increasingly popular due to their versatility, customizability, energy efficiency, constant latency, and scalability. FPGAs can be tailored to specific algorithms, enabling efficient hardware i…
View article: Resurrection Attack: Defeating Xilinx MPU's Memory Protection
Resurrection Attack: Defeating Xilinx MPU's Memory Protection Open
Memory protection units (MPUs) are hardware-assisted security features that are commonly used in embedded processors such as the ARM 940T, Infineon TC1775, and Xilinx Zynq. MPUs partition the memory statically, and set individual protectio…
View article: Highly Efficient Self-checking Matrix Multiplication on Tiled AMX Accelerators
Highly Efficient Self-checking Matrix Multiplication on Tiled AMX Accelerators Open
General Matrix Multiplication (GEMM) is a computationally expensive operation that is used in many applications such as machine learning. Hardware accelerators are increasingly popular for speeding up GEMM computation, with Tiled Matrix Mu…
View article: EZClone: Improving DNN Model Extraction Attack via Shape Distillation from GPU Execution Profiles
EZClone: Improving DNN Model Extraction Attack via Shape Distillation from GPU Execution Profiles Open
Deep Neural Networks (DNNs) have become ubiquitous due to their performance on prediction and classification problems. However, they face a variety of threats as their usage spreads. Model extraction attacks, which steal DNNs, endanger int…
View article: ACTION: Adaptive Cache Block Migration in Distributed Cache Architectures
ACTION: Adaptive Cache Block Migration in Distributed Cache Architectures Open
Chip multiprocessors (CMP) with more cores have more traffic to the last-level cache (LLC) . Without a corresponding increase in LLC bandwidth, such traffic cannot be sustained, resulting in performance degradation. Previous research focus…
View article: Hardening DNNs against Transfer Attacks during Network Compression using Greedy Adversarial Pruning
Hardening DNNs against Transfer Attacks during Network Compression using Greedy Adversarial Pruning Open
The prevalence and success of Deep Neural Network (DNN) applications in recent years have motivated research on DNN compression, such as pruning and quantization. These techniques accelerate model inference, reduce power consumption, and r…
View article: On Co-Optimization Of Constrained Satisfiability Problems For Hardware Software Applications
On Co-Optimization Of Constrained Satisfiability Problems For Hardware Software Applications Open
Manufacturing technology has permitted an exponential growth in transistor count and density. However, making efficient use of the available transistors in the design has become exceedingly difficult. Standard design flow involves synthesi…
View article: MILR: Mathematically Induced Layer Recovery for Plaintext Space Error Correction of CNNs
MILR: Mathematically Induced Layer Recovery for Plaintext Space Error Correction of CNNs Open
The increased use of Convolutional Neural Networks (CNN) in mission critical systems has increased the need for robust and resilient networks in the face of both naturally occurring faults as well as security attacks. The lack of robustnes…
View article: Deep-Lock: Secure Authorization for Deep Neural Networks
Deep-Lock: Secure Authorization for Deep Neural Networks Open
Trained Deep Neural Network (DNN) models are considered valuable Intellectual Properties (IP) in several business models. Prevention of IP theft and unauthorized usage of such DNN models has been raised as of significant concern by industr…
View article: Enabling IC Traceability via Blockchain Pegged to Embedded PUF
Enabling IC Traceability via Blockchain Pegged to Embedded PUF Open
Globalization of IC supply chain has increased the risk of counterfeit, tampered, and re-packaged chips in the market. Counterfeit electronics poses a security risk in safety critical applications like avionics, SCADA systems, and defense.…
View article: On Improving Reliability of SRAM-Based Physically Unclonable Functions
On Improving Reliability of SRAM-Based Physically Unclonable Functions Open
Physically unclonable functions (PUFs) have been touted for their inherent resistance to invasive attacks and low cost in providing a hardware root of trust for various security applications. SRAM PUFs in particular are popular in industry…
View article: Guest Editorial: Special Section on Circuit and System Design Methodologies for Emerging Technologies
Guest Editorial: Special Section on Circuit and System Design Methodologies for Emerging Technologies Open
The demand for ever smaller, portable, energy-efficient and high-performance electronic systems has been the primary driver for CMOS technology scaling. As CMOS scaling approaches physical limits, it has been fraught with challenges that r…
View article: A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors
A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors Open
Device reliability and manufacturability have emerged as dominant concerns in end-of-road CMOS devices. An increasing number of hardware failures are attributed to manufacturability or reliability problems. Maintaining an acceptable manufa…