Surajit Sutar
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View article: One dimensional NiMn2O4 nanofibrous architectures for symmetric supercapacitor device
One dimensional NiMn2O4 nanofibrous architectures for symmetric supercapacitor device Open
View article: Interface trap states induced underestimation of Schottky barrier height in metal-MX2 junctions
Interface trap states induced underestimation of Schottky barrier height in metal-MX2 junctions Open
Understanding the interfaces between a contact metal and a two-dimensional (2D) semiconductor, as well as the dielectric gate stack and the same 2D material in transition metal dichalcogenide (TMD) based transistors, is a crucial step towa…
View article: Interface trap states induced underestimation of Schottky barrier height in Metal-MX2 Junctions
Interface trap states induced underestimation of Schottky barrier height in Metal-MX2 Junctions Open
Understanding the interfaces between a contact metal and a two-dimensional (2D) semiconductor as well as the dielectric gate stack and the same 2D material in transition metal dichalcogenide (TMD) based transistors is a crucial step toward…
View article: Thin Film Interdigital Electrode Sensors for Cost Efficient and Accurate Measurement of Ionic Concentrations in Soil and Water Samples Using Machine Learning
Thin Film Interdigital Electrode Sensors for Cost Efficient and Accurate Measurement of Ionic Concentrations in Soil and Water Samples Using Machine Learning Open
View article: Tunneling-Based Memory and Advances in Indium Phosphide-Based Processing
Tunneling-Based Memory and Advances in Indium Phosphide-Based Processing Open
This research explores InP-based tunnel diodes to supplement existing memory and high speed IC technology. Tunneling-based static random access memory (TSRAM) uses the bistability of tunnel diodes to construct memory elements and requires …
View article: Challenges of Wafer‐Scale Integration of 2D Semiconductors for High‐Performance Transistor Circuits
Challenges of Wafer‐Scale Integration of 2D Semiconductors for High‐Performance Transistor Circuits Open
Large‐area 2D‐material‐based devices may find applications as sensor or photonics devices or can be incorporated in the back end of line (BEOL) to provide additional functionality. The introduction of highly scaled 2D‐based circuits for hi…
View article: Impact of device scaling on the electrical properties of MoS2 field-effect transistors
Impact of device scaling on the electrical properties of MoS2 field-effect transistors Open
View article: Impact of Device Scaling on the Electrical Properties of MoS2 Field-effect Transistors
Impact of Device Scaling on the Electrical Properties of MoS2 Field-effect Transistors Open
Two-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Her…
View article: Low Energy Phosphorus Plasma Implantation for Isolation of MoS <sub>2</sub> Devices
Low Energy Phosphorus Plasma Implantation for Isolation of MoS <sub>2</sub> Devices Open
Device isolation is a critical but overlooked challenge in the effort to assess MoS2 as a possible material for post-Si technology nodes. Although reactive ion etching or chemical etching can be used to create isolated channels in large-ar…
View article: Polarity control in WSe2 double-gate transistors
Polarity control in WSe2 double-gate transistors Open