Yafen Yang
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View article: Temperature-Dependent Reverse-Recovery Behavior Analysis and Circuit-Level Mitigation of Superjunction MOSFETs
Temperature-Dependent Reverse-Recovery Behavior Analysis and Circuit-Level Mitigation of Superjunction MOSFETs Open
This study explores the temperature dependence of reverse-recovery behavior in superjunction metal-oxide-semiconductor field-effect-transistors (MOSFETs) using experiments and Technology Computer-Aided Design (TCAD) simulations. Results sh…
View article: A Copper-Molybdenum Etchant with Wide Process Window, Long Bath Life and High Stability for Thin Film Transistor Liquid Crystal Display Applications
A Copper-Molybdenum Etchant with Wide Process Window, Long Bath Life and High Stability for Thin Film Transistor Liquid Crystal Display Applications Open
Conventional etchants for multi-metal/alloy stacked structures often suffer from nonuniform etching, residual layers, or undercutting, failing to meet high-generation production standards. This study presents a stable copper-molybdenum (Cu…
View article: A novel Self-Biased pMOS Clamped Deep Trench CSTBT with Enhanced Short-Circuit Capability
A novel Self-Biased pMOS Clamped Deep Trench CSTBT with Enhanced Short-Circuit Capability Open
In this work, a novel deep trench CSTBT (DT-CSTBT) features emitter trench and the P-layer is proposed and investigated by simulation. The self-biased pMOS, comprising an emitter trench, N-CS layer, P-layer, and P-well, demonstrates an exc…
View article: A Novel High-Speed Split-Gate Trench Carrier-Stored Trench-Gate Bipolar Transistor with Enhanced Short-Circuit Roughness
A Novel High-Speed Split-Gate Trench Carrier-Stored Trench-Gate Bipolar Transistor with Enhanced Short-Circuit Roughness Open
A novel high-speed and process-compatible carrier-stored trench-gate bipolar transistor (CSTBT) combined with split-gate technology is proposed in this paper. The device features a split polysilicon electrode in the trench, where the left …
View article: High-performance ferroelectric field-effect transistors with ultra-thin indium tin oxide channels for flexible and transparent electronics
High-performance ferroelectric field-effect transistors with ultra-thin indium tin oxide channels for flexible and transparent electronics Open
With the development of wearable devices and hafnium-based ferroelectrics (FE), there is an increasing demand for high-performance flexible ferroelectric memories. However, developing ferroelectric memories that simultaneously exhibit good…
View article: A Performance Optimized CSTBT with Low Switching Loss
A Performance Optimized CSTBT with Low Switching Loss Open
A novel Performance Optimized Carrier Stored Trench Gate Bipolar Transistor (CSTBT) with Low Switching Loss has been proposed. By applying a positive DC voltage to the shield gate, the carrier storage effect is enhanced, the hole blocking …
View article: Structural Engineering of H<sub>0.5</sub>Z<sub>0.5</sub>O<sub>2</sub>‐Based Ferroelectric Tunneling Junction for Fast‐Speed and Low‐Power Artificial Synapses
Structural Engineering of H<sub>0.5</sub>Z<sub>0.5</sub>O<sub>2</sub>‐Based Ferroelectric Tunneling Junction for Fast‐Speed and Low‐Power Artificial Synapses Open
Advanced synaptic devices capable of neuromorphic data processing are widely studied as the building block in the next‐generation computing architecture for artificial intelligence applications. Due to its fast speed, low power, and excell…
View article: Polarization of Bi2Se3 thin film toward non-volatile memory applications
Polarization of Bi2Se3 thin film toward non-volatile memory applications Open
In recent years, topological insulators have drawn growing interest as a unique electronic state of matter toward quantum information technology. Despite the logic devices with magnetization switching through spin–orbit torque or the topol…
View article: Multibit non-volatile memory based on WS2 transistor with engineered gate stack
Multibit non-volatile memory based on WS2 transistor with engineered gate stack Open
In this work, a prototype of a charge-trapping memory device based on two-dimensional WS2 has been fabricated with an engineered gate stack for multilevel non-volatile memory application. A Si/SiO2/ITO/Al2O3/Ta2O5/Al2O3 stack has been succ…
View article: Multifunctional black phosphorus/MoS <sub>2</sub> van der Waals heterojunction
Multifunctional black phosphorus/MoS <sub>2</sub> van der Waals heterojunction Open
The fast-developing information technology has imposed an urgent need for effective solutions to overcome the limitations of integration density in chips with smaller size but higher performance. van der Waals heterojunctions built with tw…
View article: Resolution and Racemization of a Planar-Chiral A1/A2-Disubstituted Pillar[5]arene
Resolution and Racemization of a Planar-Chiral A1/A2-Disubstituted Pillar[5]arene Open
Butoxycarbonyl (Boc)-protected pillar[4]arene[1]-diaminobenzene (BP) was synthesized by introducing the Boc protection onto the A1/A2 positions of BP. The oxygen-through-annulus rotation was partially inhibited because of the presence of t…
View article: Correction: Guest-regulated chirality switching of planar chiral <i>pseudo</i>[1]catenanes
Correction: Guest-regulated chirality switching of planar chiral <i>pseudo</i>[1]catenanes Open
Correction for ‘Guest-regulated chirality switching of planar chiral pseudo[1]catenanes’ by Ya-Fen Yang et al., Org. Biomol. Chem., 2018, DOI: 10.1039/c8ob00156a.