Memory address ≈ Memory address
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SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput Open
In-memory processing can dramatically improve the latency and energy consumption of computing systems by minimizing the data transfer between the memory and the processor. Efficient execution of processing operations within the memory is t…
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Cornucopia: Temporal Safety for CHERI Heaps Open
Use-after-free violations of temporal memory safety continue to plague software systems, underpinning many high-impact exploits. The CHERI capability system shows great promise in achieving C and C++ language spatial memory safety, prevent…
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HRF-Relaxed Open
Memory consistency models, or memory models, allow both programmers and program language implementers to reason about concurrent accesses to one or more memory locations. Memory model specifications balance the often conflicting needs for …
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Performance evaluation of Unified Memory with prefetching and oversubscription for selected parallel CUDA applications on NVIDIA Pascal and Volta GPUs Open
The paper presents assessment of Unified Memory performance with data prefetching and memory oversubscription. Several versions of code are used with: standard memory management, standard Unified Memory and optimized Unified Memory with pr…
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Umpire: Application-focused management and coordination of complex hierarchical memory Open
Advanced architectures like Sierra provide a wide range of memory resources that must often be carefully controlled by the user. These resources have varying capacities, access timing rules, and visibility to different compute resources. A…
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Benchmarking and Evaluating Unified Memory for OpenMP GPU Offloading Open
Here, the latest OpenMP standard offers automatic device offloading capabilities which facilitate GPU programming. Despite this, there remain many challenges. One of these is the unified memory feature introduced in recent GPUs. GPUs in cu…
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Jaaru: efficiently model checking persistent memory programs Open
Persistent memory (PM) technologies combine near DRAM performance with persistency and open the possibility of using one copy of a data structure as both a working copy and a persistent store of the data. Ensuring that these persistent dat…
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Precise Runahead Execution Open
Runahead execution improves processor performance by accurately prefetching long-latency memory accesses. When a long-latency load causes the instruction window to fill up and halt the pipeline, the processor enters runahead mode and keeps…
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Programming Persistent Memory: A Comprehensive Guide for Developers Open
Beginning and experienced programmers will use this comprehensive guide to persistent memory programming. You will understand how persistent memory brings together several new software/hardware requirements, and offers great promise for be…
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Evaluating atomicity, and integrity of correct memory acquisition methods Open
With increased use of forensic memory analysis, the soundness of memory acquisition becomes more important. We therefore present a black box analysis technique in which memory contents are constantly changed via our payload application wit…
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PEM: Remote forensic acquisition of PLC memory in industrial control systems Open
Programmable logic controllers (PLC) are special-purpose embedded devices used in various industries for automatic control of physical processes. Cyberattacks on PLCs can unleash mayhem in the physical world. In case of a security breach, …
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Computer System Architecture Open
System Architecture is a comprehensive book that provides a detailed understanding of computer systems and their organization. The book is divided into five units, each of which deals with a specific topic related to computer architecture.…
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Reverse Engineering x86 Processor Microcode Open
Microcode is an abstraction layer on top of the physical components of a CPU and present in most general-purpose CPUs today. In addition to facilitate complex and vast instruction sets, it also provides an update mechanism that allows CPUs…
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MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory Open
In recent years, we are witnessing a trend toward in-memory computing for future generations of computers that differs from traditional von-Neumann architecture in which there is a clear distinction between computing and memory units. Cons…
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Memory forensic analysis of a programmable logic controller in industrial control systems Open
In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the me…
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Decoupling lock-free data structures from memory reclamation for static analysis Open
Verification of concurrent data structures is one of the most challenging tasks in software verification. The topic has received considerable attention over the course of the last decade. Nevertheless, human-driven techniques remain cumber…
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Nonvolatile Memristive Materials and Physical Modeling for In‐Memory and In‐Sensor Computing Open
Separate memory and processing units are utilized in conventional von Neumann computational architectures. However, regarding the energy and the time, it is costly to shuffle data between the memory and the processing entity, and for data‐…
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Deep Q-Learning with Bit-Swapping-Based Linear Feedback Shift Register fostered Built-In Self-Test and Built-In Self-Repair for SRAM Open
Including redundancy is popular and widely used in a fault-tolerant method for memories. Effective fault-tolerant methods are a demand of today’s large-size memories. Recently, system-on-chips (SOCs) have been developed in nanotechnology, …
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Towards Symbolic Pointers Reasoning in Dynamic Symbolic Execution Open
Dynamic symbolic execution is a widely used technique for automated software\ntesting, designed for execution paths exploration and program errors detection.\nA hybrid approach has recently become widespread, when the main goal of\nsymboli…
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PANIC: PAN-assisted Intra-process Memory Isolation on ARM Open
Intra-process memory isolation is a well-known technique to enforce least privilege within a process. In this paper, we propose a generic and efficient intra-process memory isolation technique named PANIC, by leveraging Privileged Access N…
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Styx: Countering robust memory acquisition Open
Images of main memory are an increasingly important piece of evidence in cybercrime investigations, especially against advanced malware threats, and software tools that dump memory during normal system operation are the most common way to …
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Can Flight Data Recorder Memory Be Stored on the Cloud? Open
Flight data recorders (FDRs, or black boxes) generate data that is collected on an embedded memory device. A well-known difficulty with these devices is that the embedded memory device runs out of space. To avoid getting into this problema…
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EP-PQM: Efficient Parametric Probabilistic Quantum Memory With Fewer Qubits and Gates Open
Machine learning (ML) classification tasks can be carried out on a quantum computer (QC) using probabilistic quantum memory (PQM) and its extension, parametric PQM (P-PQM), by calculating the Hamming distance between an input pattern and a…
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SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput Open
In-memory processing can dramatically improve the latency and energy consumption of computing systems by minimizing the data transfer between the memory and the processor. Efficient execution of processing operations within the memory is t…
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Evaluating the effectiveness of program data features for guiding memory management Open
Recent trends have led to the adoption of larger and more complex memory systems, often with multiple tiers of memory performance within the same platform. To utilize complex memory systems efficiently, current data management strategies m…
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Computer hardware to support capability based addressing in a large virtual memory Open
This thesis was scanned from the print manuscript for digital preservation and is copyright the author. Researchers can access this thesis by asking their local university, institution or public library to make a request on their behalf. M…
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Energy-efficient In-Memory Address Calculation Open
Computation-in-Memory (CIM) is an emerging computing paradigm to address memory bottleneck challenges in computer architecture. A CIM unit cannot fully replace a general-purpose processor. Still, it significantly reduces the amount of data…
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BoundShield: Comprehensive Mitigation for Memory Disclosure Attacks via Secret Region Isolation Open
Address space layout randomization (ASLR) is now widely adopted in modern operating systems to thwart code reuse attacks. However, an adversary can still bypass fine-grained ASLR by exploiting memory corruption vulnerabilities and performi…
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RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures Open
Most modern CPU architectures are based on the von Neumann principle, where memory and processing units are separate entities. Although processing unit performance has improved over the years, memory capacity has not followed the same tren…
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SPX64 Open
General-purpose computing systems employ memory hierarchies to provide the appearance of a single large, fast, coherent memory. In special-purpose CPUs, programmers manually manage distinct, non-coherent scratchpad memories. In this articl…