Combinational logic ≈ Combinational logic
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The EPFL Combinational Benchmark Suite Open
The EPFL Combinational Benchmark Suite was introduced in 2015 with the aim of defining a new comparative standard for the logic optimization and synthesis community. It originally consisted of 23 combinational circuits designed to challeng…
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Majority-Inverter Graph: A New Paradigm for Logic Optimization Open
In this paper, we propose a paradigm shift in representing and optimizing logic by using only majority (MAJ) and inversion (INV) functions as basic operations. We represent logic functions by Majority-Inverter Graph (MIG): a directed acycl…
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Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach Open
Logic locking is a prominent technique to protect the integrity of hardware designs throughout the integrated circuit design and fabrication flow. However, in recent years, the security of locking schemes has been thoroughly challenged by …
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Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits Open
The capability of multiple valued logic (MVL) circuits to achieve higher storage density when compared to that of existing binary circuits is highly impressive. Recently, MVL circuits have attracted significant attention for the design of …
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Design Space Exploration of Neural Network Activation Function Circuits Open
The widespread application of artificial neural networks has prompted researchers to experiment with field-programmable gate array and customized ASIC designs to speed up their computation. These implementation efforts have generally focus…
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Metal–Organic Framework-Based Chemo-Photothermal Combinational System for Precise, Rapid, and Efficient Antibacterial Therapeutics Open
Rapid increase of antimicrobial resistance has become an urgent threat to global public health. In this research, since photothermal therapy is a potential antibacterial strategy, which is less likely to cause resistance, a metal–organic f…
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MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method Open
International audience
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Recent advances in integrated optical directed logic operations for high performance optical computing: a review Open
Optical directed logic (DL) is a novel logic operation scheme that employs electrical signals as operands to control the working states of optical switches to perform the logic functions. This review first provides an overview of the conce…
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Design an All-Optical Combinational Logic Circuits Based on Nano-Ring Insulator-Metal-Insulator Plasmonic Waveguides Open
In this paper, we propose, analyze and simulate a new configuration to simulate all-optical combinational logic functions based on Nano-rings insulator-metal-insulator (IMI) plasmonic waveguides. We used Finite Element Method (FEM) to anal…
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Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches Open
Technology scaling poses an increasing challenge to the reliability of digital circuits. Hardware redundancy solutions, such as triple modular redundancy (TMR), produce very high area overhead, so partial redundancy is often used to reduce…
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Inverse-designed Metamaterials for On-chip Combinational Optical Logic Circuit Open
Optical analog computing has recently sparked growing interest due to the appealing characteristics of low energy consumption parallel processing and ultrafast speed, spawning it complementary to conventional electronic computing.As the ba…
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Multi-Threshold NULL Convention Logic (MTNCL): An Ultra-Low Power Asynchronous Circuit Design Methodology Open
This paper develops an ultra-low power asynchronous circuit design methodology, called Multi-Threshold NULL Convention Logic (MTNCL), also known as Sleep Convention Logic (SCL), which combines Multi-Threshold CMOS (MTCMOS) with NULL Conven…
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FAULT-TOLERANT SELT-TIMED COUNTERS Open
The article studies the fault-tolerant self-timed (ST) counter design problem. Combinational ST circuits have a higher fault tolerance in comparison with synchronous counterparts due to redundant information coding and mandatory acknowledg…
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Nano-bio-computing lipid nanotablet Open
A supported lipid bilayer is used as a chemical circuit board to carry out molecular computation with a network of nanoparticles.
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Precise error determination of approximated components in sequential circuits with model checking Open
Error metrics are used to evaluate the quality of an approximated circuit or to trade-off several approximated candidates in design exploration. Precisely determining the error or all approximated circuit is a hard problem since the errors…
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Boolean Computation Using Self-Sustaining Nonlinear Oscillators Open
Self-sustaining nonlinear oscillators of practically any type can function as\nlatches and registers if Boolean logic states are represented physically as the\nphase of oscillatory signals. Combinational operations on such phase-encoded\nl…
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Computational methods of minimization of multiple functions Open
The article discusses computational methods for minimizing multivalued functions. The problems of the minimization of combinational circuits are investigated. An effective heuristic method intended to simplify the canonical forms of arbitr…
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Real-Time Diagnosis of Multiple Transistor Open-Circuit Faults in a T-Type Inverter Based on Finite-State Machine Model Open
This paper proposes a fault diagnosis method to diagnose multiple transistor open-circuit faults in a T-type three-level inverter. In this method, a finite-state machine (FSM) tracks state transitions caused by abnormal fault-linked curren…
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Algebraic Bethe Circuits Open
The Algebraic Bethe Ansatz (ABA) is a highly successful analytical method used to exactly solve several physical models in both statistical mechanics and condensed-matter physics. Here we bring the ABA into unitary form, for its direct imp…
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Reliability Analysis of Dynamic Fault Tree Based on Binary Decision Diagrams for Explosive Vehicle Open
Dynamic fault tree is often used to analyze system reliability. The Markov model is a commonly used method, which can accurately reflect the relationship between the state transition process and the dynamic logic gate transfer in the dynam…
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Technology mapping oriented to adaptive logic modules Open
This paper presents an innovative method of technology mapping of the circuits in ALM appearing in FPGA devices by Intel. The essence of the idea is based on using triangle tables that are connected with different configurations of blocks.…
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A Simulation-Guided Paradigm for Logic Synthesis and Verification Open
This article proposes a new logic synthesis and verification paradigm based on circuit simulation. In this paradigm, high quality, expressive simulation patterns are pregenerated to be reused in multiple runs of optimization and verificati…
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Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption Open
The SAT attack has shown to be efficient against most combinational logic encryption methods. It can be extended to attack sequential logic encryption techniques by leveraging circuit unrolling and model checking methods. However, with no …
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Designing single layer counter in quantum-dot cellular automata with energy dissipation analysis Open
Quantum-dot cellular automata is a promising nanotechnology and a possible alternative to complementary metal-oxide-semiconductor (CMOS) transistors. Nowadays, several sequential and combinational logic circuits have been designed and impl…
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Boolean logic optimization in majority-inverter graphs Open
We present a Boolean logic optimization framework based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. Current MIG optimization is supported by …
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A Pipelined Non-Deterministic Finite Automaton-Based String Matching Scheme Using Merged State Transitions in an FPGA Open
This paper proposes a pipelined non-deterministic finite automaton (NFA)-based string matching scheme using field programmable gate array (FPGA) implementation. The characteristics of the NFA such as shared common prefixes and no failure t…
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Feasibility of combinational burnable poison pins for 24-month cycle PWR reload core Open
The Burnable Poison (BP) is very important for all Light Water Reactors in order to hold-down the initial excess reactivity and to control power peaking. The use of BP is even more essential as the excess reactivity increases significantly…
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A dynamically reconfigurable logic cell: from artificial neural networks to quantum-dot cellular automata Open
Considering the lack of optimization support for Quantum-dot Cellular Automata, we propose a dynamically reconfigurable logic cell capable of implementing various logic operations by means of artificial neural networks. The cell can be rec…
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A Review on Online Testability for Reversible Logic Open
Reversible logic is the key to enter into the new era of incredibly compact electronic devices with ultra low power consumption. Testing of these devices is another significant issue. As a new technology, new fault models are finding their…
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A Hardware Trojan Detection Method Based on Structural Features of Trojan and Host Circuits Open
Modern IC designs often involve outsourced IP cores. It is convinced that there are opportunities in which the IP cores contain malicious logic, namely hardware Trojan (HT), which raises serious concerns about the trustworthiness of ICs us…